JP2002026153A5 - - Google Patents
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- Publication number
- JP2002026153A5 JP2002026153A5 JP2000208341A JP2000208341A JP2002026153A5 JP 2002026153 A5 JP2002026153 A5 JP 2002026153A5 JP 2000208341 A JP2000208341 A JP 2000208341A JP 2000208341 A JP2000208341 A JP 2000208341A JP 2002026153 A5 JP2002026153 A5 JP 2002026153A5
- Authority
- JP
- Japan
- Prior art keywords
- switching element
- charge storage
- storage layer
- semiconductor memory
- memory cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000208341A JP2002026153A (ja) | 2000-07-10 | 2000-07-10 | 半導体メモリ |
TW089113982A TW475267B (en) | 1999-07-13 | 2000-07-13 | Semiconductor memory |
US09/615,803 US6411548B1 (en) | 1999-07-13 | 2000-07-13 | Semiconductor memory having transistors connected in series |
KR10-2000-0040174A KR100391404B1 (ko) | 1999-07-13 | 2000-07-13 | 반도체 메모리 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000208341A JP2002026153A (ja) | 2000-07-10 | 2000-07-10 | 半導体メモリ |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008217927A Division JP2008311679A (ja) | 2008-08-27 | 2008-08-27 | 半導体メモリの閾値設定方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2002026153A JP2002026153A (ja) | 2002-01-25 |
JP2002026153A5 true JP2002026153A5 (zh) | 2005-07-07 |
Family
ID=18704936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000208341A Pending JP2002026153A (ja) | 1999-07-13 | 2000-07-10 | 半導体メモリ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2002026153A (zh) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100414211B1 (ko) * | 2001-03-17 | 2004-01-07 | 삼성전자주식회사 | 모노스 게이트 구조를 갖는 비휘발성 메모리소자 및 그제조방법 |
KR100395755B1 (ko) * | 2001-06-28 | 2003-08-21 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
JP2004039866A (ja) | 2002-07-03 | 2004-02-05 | Toshiba Corp | 半導体装置及びその製造方法 |
KR100504691B1 (ko) * | 2003-01-10 | 2005-08-03 | 삼성전자주식회사 | 전하저장절연막을 가지는 비휘발성 메모리 소자 및 그제조방법 |
JP2005116119A (ja) * | 2003-10-10 | 2005-04-28 | Toshiba Corp | 不揮発性半導体記憶装置 |
KR100578131B1 (ko) * | 2003-10-28 | 2006-05-10 | 삼성전자주식회사 | 비휘발성 기억 소자 및 그 형성 방법 |
JP4398750B2 (ja) | 2004-02-17 | 2010-01-13 | 株式会社東芝 | Nand型フラッシュメモリ |
US7075828B2 (en) * | 2004-04-26 | 2006-07-11 | Macronix International Co., Intl. | Operation scheme with charge balancing erase for charge trapping non-volatile memory |
JP4802040B2 (ja) | 2006-01-23 | 2011-10-26 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP5161494B2 (ja) * | 2007-02-01 | 2013-03-13 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
JP2010118580A (ja) * | 2008-11-14 | 2010-05-27 | Toshiba Corp | 不揮発性半導体記憶装置 |
JP2011029576A (ja) | 2009-06-23 | 2011-02-10 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100279782B1 (ko) * | 1992-07-06 | 2001-02-01 | 가나이 쓰도무 | 불휘발성 반도체기억장치 |
JP3595691B2 (ja) * | 1998-08-25 | 2004-12-02 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP3540640B2 (ja) * | 1998-12-22 | 2004-07-07 | 株式会社東芝 | 不揮発性半導体記憶装置 |
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2000
- 2000-07-10 JP JP2000208341A patent/JP2002026153A/ja active Pending
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