JP2001217712A5 - - Google Patents
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- Publication number
- JP2001217712A5 JP2001217712A5 JP2000024940A JP2000024940A JP2001217712A5 JP 2001217712 A5 JP2001217712 A5 JP 2001217712A5 JP 2000024940 A JP2000024940 A JP 2000024940A JP 2000024940 A JP2000024940 A JP 2000024940A JP 2001217712 A5 JP2001217712 A5 JP 2001217712A5
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- JP
- Japan
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Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000024940A JP4631120B2 (ja) | 2000-02-02 | 2000-02-02 | 周波数シンセサイザ、位相同期ループ周波数シンセサイザ |
| US09/776,510 US6593783B2 (en) | 2000-02-02 | 2001-02-02 | Compensation circuit for fractional-N frequency PLL synthesizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000024940A JP4631120B2 (ja) | 2000-02-02 | 2000-02-02 | 周波数シンセサイザ、位相同期ループ周波数シンセサイザ |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001217712A JP2001217712A (ja) | 2001-08-10 |
| JP2001217712A5 true JP2001217712A5 (enExample) | 2007-03-15 |
| JP4631120B2 JP4631120B2 (ja) | 2011-02-16 |
Family
ID=18550862
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000024940A Expired - Fee Related JP4631120B2 (ja) | 2000-02-02 | 2000-02-02 | 周波数シンセサイザ、位相同期ループ周波数シンセサイザ |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6593783B2 (enExample) |
| JP (1) | JP4631120B2 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7012984B2 (en) * | 1999-07-29 | 2006-03-14 | Tropian, Inc. | PLL noise smoothing using dual-modulus interleaving |
| KR100519482B1 (ko) * | 2002-11-30 | 2005-10-07 | 인티그런트 테크놀로지즈(주) | 전압 제어 발진기의 주파수 이득 변화가 보상된 위상 고정루프 주파수 합성기 |
| US7038507B2 (en) * | 2003-11-14 | 2006-05-02 | Teledyne Technologies Incorporated | Frequency synthesizer having PLL with an analog phase detector |
| DE102004041656B4 (de) * | 2004-08-27 | 2007-11-08 | Infineon Technologies Ag | Phasenregelkreis und Verfahren zum Abgleichen eines Schleifenfilters |
| JP4251640B2 (ja) * | 2004-12-17 | 2009-04-08 | インターナショナル・ビジネス・マシーンズ・コーポレーション | クロック生成回路及びその方法 |
| KR100717880B1 (ko) * | 2005-05-19 | 2007-05-14 | 최중호 | Sar 방식을 이용한 연속-시간 아날로그 필터의 주파수 보정 회로 |
| DE102005023909B3 (de) * | 2005-05-24 | 2006-10-12 | Infineon Technologies Ag | Digitaler Phasenregelkreis und Verfahren zur Korrektur von Störanteilen in einem Phasenregelkreis |
| US7663415B2 (en) * | 2005-12-30 | 2010-02-16 | Stmicroelectronics Pvt. Ltd. | Phase locked loop (PLL) method and architecture |
| US7656236B2 (en) | 2007-05-15 | 2010-02-02 | Teledyne Wireless, Llc | Noise canceling technique for frequency synthesizer |
| US8179045B2 (en) | 2008-04-22 | 2012-05-15 | Teledyne Wireless, Llc | Slow wave structure having offset projections comprised of a metal-dielectric composite stack |
| US20100073096A1 (en) * | 2008-09-22 | 2010-03-25 | Texas Instruments Incorporated | Micro electro-mechanical system based programmable frequency synthesizer and method of operation thereof |
| US8248167B2 (en) * | 2010-06-28 | 2012-08-21 | Mstar Semiconductor, Inc. | VCO frequency temperature compensation system for PLLs |
| US9202660B2 (en) | 2013-03-13 | 2015-12-01 | Teledyne Wireless, Llc | Asymmetrical slow wave structures to eliminate backward wave oscillations in wideband traveling wave tubes |
| US10401409B2 (en) * | 2016-04-22 | 2019-09-03 | Infineon Technologies Austria Ag | Capacitance determination circuit and method for determining a capacitance |
| US11277140B1 (en) | 2021-06-07 | 2022-03-15 | Qualcomm Incorporated | Sampling phase-locked loop |
| CN115549674A (zh) * | 2021-06-29 | 2022-12-30 | 海能达通信股份有限公司 | 锁相环电路的控制方法、频率发生装置及可读存储介质 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5517685A (en) * | 1993-04-27 | 1996-05-14 | Matsushita Electric Industrial Co., Ltd. | PLL circuit having a multiloop, and FM receiving method and apparatus able to utilize the same |
| JPH09279970A (ja) | 1996-04-17 | 1997-10-28 | Bunka Shutter Co Ltd | シャッターの障害物検知装置 |
| JP3901810B2 (ja) * | 1997-09-26 | 2007-04-04 | 日本テキサス・インスツルメンツ株式会社 | 補正回路付き周波数シンセサイザ |
| JP3923150B2 (ja) | 1997-10-16 | 2007-05-30 | 日本テキサス・インスツルメンツ株式会社 | 周波数シンセサイザ |
| US6236275B1 (en) * | 1997-10-24 | 2001-05-22 | Ericsson Inc. | Digital frequency synthesis by sequential fraction approximations |
| JPH11289275A (ja) * | 1998-04-03 | 1999-10-19 | Sony Corp | Ｐｌｌ回路 |
| US6137372A (en) * | 1998-05-29 | 2000-10-24 | Silicon Laboratories Inc. | Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications |
| US6064272A (en) * | 1998-07-01 | 2000-05-16 | Conexant Systems, Inc. | Phase interpolated fractional-N frequency synthesizer with on-chip tuning |
| US6249685B1 (en) * | 1998-12-21 | 2001-06-19 | Texas Instruments Incorporated | Low power fractional pulse generation in frequency tracking multi-band fractional-N phase lock loop |
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2000
- 2000-02-02 JP JP2000024940A patent/JP4631120B2/ja not_active Expired - Fee Related
-
2001
- 2001-02-02 US US09/776,510 patent/US6593783B2/en not_active Expired - Lifetime