JP2001135084A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JP2001135084A
JP2001135084A JP31709699A JP31709699A JP2001135084A JP 2001135084 A JP2001135084 A JP 2001135084A JP 31709699 A JP31709699 A JP 31709699A JP 31709699 A JP31709699 A JP 31709699A JP 2001135084 A JP2001135084 A JP 2001135084A
Authority
JP
Japan
Prior art keywords
data
input
signal
address
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31709699A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001135084A5 (enExample
Inventor
Yoshiyuki Shimizu
禎之 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP31709699A priority Critical patent/JP2001135084A/ja
Priority to US09/564,675 priority patent/US6215704B1/en
Publication of JP2001135084A publication Critical patent/JP2001135084A/ja
Publication of JP2001135084A5 publication Critical patent/JP2001135084A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals

Landscapes

  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP31709699A 1999-11-08 1999-11-08 半導体記憶装置 Pending JP2001135084A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP31709699A JP2001135084A (ja) 1999-11-08 1999-11-08 半導体記憶装置
US09/564,675 US6215704B1 (en) 1999-11-08 2000-05-04 Semiconductor memory device allowing reduction in a number of external pins

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31709699A JP2001135084A (ja) 1999-11-08 1999-11-08 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2001135084A true JP2001135084A (ja) 2001-05-18
JP2001135084A5 JP2001135084A5 (enExample) 2006-12-21

Family

ID=18084404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31709699A Pending JP2001135084A (ja) 1999-11-08 1999-11-08 半導体記憶装置

Country Status (2)

Country Link
US (1) US6215704B1 (enExample)
JP (1) JP2001135084A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006012374A (ja) * 2004-05-26 2006-01-12 Nec Electronics Corp 半導体記憶装置
JP2006313614A (ja) * 2005-05-02 2006-11-16 Samsung Electronics Co Ltd メモリ装置の構造
US8520457B2 (en) 2006-12-26 2013-08-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6587384B2 (en) * 2001-04-21 2003-07-01 Hewlett-Packard Development Company, L.P. Multi-function serial I/O circuit
US7466160B2 (en) * 2002-11-27 2008-12-16 Inapac Technology, Inc. Shared memory bus architecture for system with processor and memory units
WO2007130640A2 (en) * 2006-05-04 2007-11-15 Inapac Technology, Inc. Memory device including multiplexed inputs
US7466603B2 (en) * 2006-10-03 2008-12-16 Inapac Technology, Inc. Memory accessing circuit system
US7865629B1 (en) * 2009-11-24 2011-01-04 Microsoft Corporation Configurable connector for system-level communication
US8719112B2 (en) * 2009-11-24 2014-05-06 Microsoft Corporation Invocation of accessory-specific user experience
WO2025138209A1 (zh) * 2023-12-29 2025-07-03 声龙(新加坡)私人有限公司 一种芯片设计中实现引脚分配的方法及装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939692A (en) * 1988-09-15 1990-07-03 Intel Corporation Read-only memory for microprocessor systems having shared address/data lines
JPH04328384A (ja) 1991-04-30 1992-11-17 Toshiba Corp メモリカード
US5249160A (en) * 1991-09-05 1993-09-28 Mosel SRAM with an address and data multiplexer
JP3176144B2 (ja) 1992-08-28 2001-06-11 日本電気株式会社 同期型スタチックメモリ
US5587957A (en) * 1995-09-29 1996-12-24 Intel Corporation Circuit for sharing a memory of a microcontroller with an external device
US5719878A (en) * 1995-12-04 1998-02-17 Motorola Inc. Scannable storage cell and method of operation
JP3201335B2 (ja) * 1998-03-17 2001-08-20 日本電気株式会社 メモリアドレス発生回路及び半導体記憶装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006012374A (ja) * 2004-05-26 2006-01-12 Nec Electronics Corp 半導体記憶装置
JP2006313614A (ja) * 2005-05-02 2006-11-16 Samsung Electronics Co Ltd メモリ装置の構造
US8520457B2 (en) 2006-12-26 2013-08-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
US6215704B1 (en) 2001-04-10

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