JP2001102492A - Wiring board and mounting structure thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board and mounting structure therefor which an reduce a thermal stress generated in a connected part resulting from a thermal expansion difference between a package and an external circuit substrate, can maintain a strong and stable connection to the external circuit substrate over a long period of time, and can realize a low height and high-density lands. SOLUTION: A mounting structure for wiring boards includes a wiring board A and an external circuit board B. The wiring board A for a package has a ceramic insulating substrate 1 having a semiconductor element 4 flip-chip bonded thereto, lands 3 provided on a rear side of the substrate 1 and a metallized wiring layer 2. The board A is bonded with brazing material 7 to a land 9 on an insulator 8 of the external circuit board B. The substrate 1 has low rigidity satisfying a relation of E×t3<=30 (Gpa.mm3) (where, E is Young's modulus and (t) is the thickness (mm) of the insulating substrate). A thermal expansion difference between the substrate 1 and insulator 8 is not larger than 10 ppm/ deg.C, and the brazing material 7 between the lands 3 and 9 has a thickness of 0.3 mm or less.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a wiring board on which a semiconductor element such as a package is mounted, and further connects the wiring board to a surface of an external circuit board provided with an insulator containing an organic resin by using a brazing material. The mounting structure of the wiring board for this.

[0002]

2. Description of the Related Art Conventionally, a wiring board has a structure in which a metallized wiring layer is provided on or in an insulating substrate. A typical example of the wiring substrate is a semiconductor element housing package for housing a semiconductor element, particularly a semiconductor integrated circuit element such as an LSI (Large Scale Integrated Circuit), which is generally provided on the surface of an insulating substrate made of alumina ceramics. A semiconductor element mounting portion is formed, and a plurality of metallized wiring layers made of a high melting point metal powder such as tungsten and molybdenum are provided on the surface and inside of the insulating substrate, and are connected to the semiconductor element. A land portion for connecting to an external circuit board is provided on the lower surface or side surface of the insulating substrate, and the land portion is electrically connected to the metallized wiring layer.

[0003] The mounting of a semiconductor element in the above-mentioned package is conventionally performed by a wire bonding method in which a connection electrode formed on the semiconductor element and a metallized wiring layer formed around the element mounting portion on the package side are connected by wires. More widely used. The semiconductor element by this wire bonding is fixed to the surface of the insulating substrate by applying a thermosetting resin such as an epoxy resin between the semiconductor element and the insulating substrate and curing and bonding. Further, as a mounting method other than the above, the semiconductor element is mounted on a metallization layer formed on the package side, and a connection terminal formed on the semiconductor element and the metallization wiring layer are directly connected by soldering or the like. A so-called flip-chip mounting is also known.

In general, as the degree of integration of semiconductor devices increases,
Although the number of electrodes formed on the semiconductor element also increases, the number of terminals in the semiconductor element housing package for housing the same also increases. However, as the number of electrodes increases, the size of the package itself needs to be increased, but at the same time, miniaturization is also required. Therefore, it is necessary to increase the density of connection terminals in the package.

Conventionally, as a structure of connection terminals in a package, a pin grid array (PGA) in which metal pins such as Kovar are connected to the lower surface of the package has been most common, but recently, it has been led out to the side of the package. Quad flat package (QFP) in which an L-shaped metal member is brazed to a metallized wiring layer;
The mainstream package is a leadless chip carrier ((LCC)) without lead pins with electrode pads on one side, and a ball grid array (BGA) consisting of spherical terminals made of solder on the lower surface of an insulating substrate. Furthermore, the demand for smaller packages has been increasing year by year, and recently, among the BGA type packages, the shift to a chip size package (CSP) having a chip area of 50% or more of the package area has been progressing.

A so-called land grid array, in which a ball grid array (BGA) type package is connected to an external circuit board via solder balls, while the ball grid array (BGA) type package is connected only by printing solder paste without using solder balls. (LGA) type packages are also known.

The connection terminals of a ball grid array (BGA) or a chip size package (CSP) are formed by connecting spherical terminals made of a brazing material such as solder to connection pads of an insulating substrate. The spherical terminals are placed and abutted on the lands of the circuit board, and then heated and melted at a temperature of 150 to 400 ° C., and the spherical terminals are bonded to the lands to be mounted on the external circuit board. Have been done.

On the other hand, in the LGA type package, a step for mounting solder balls can be omitted, so that the cost of the package can be reduced. Further, since the thickness of the solder for connecting the insulating substrate and the external circuit board is small, there is an advantage that the height of the entire package can be reduced.

Further, ceramics such as alumina, mullite, aluminum nitride and silicon nitride have conventionally been used as a ceramic insulating substrate in a package for accommodating a semiconductor element, but recently, low-resistance Cu is used as a conductor material. Can be simultaneously fired.
Low-temperature fired ceramics such as glass ceramics that can be fired at 000 ° C. or lower have also been developed.

[0010]

SUMMARY OF THE INVENTION As an insulating substrate material,
Ceramics such as alumina and mullite have been used more frequently as insulating substrates in the above packages because they have high breaking strength and are highly reliable as a multi-layering technology with metallized wiring layers. A package comprising a glass-epoxy resin composite material,
When mounted on an external circuit board such as a printed board containing an organic resin such as a glass-polyimide resin composite material,
When the heat generated during the operation of the semiconductor element is repeatedly applied to both the package and the external circuit board, a difference in thermal expansion occurs due to a difference in the coefficient of thermal expansion between the external circuit board and the package.

The difference in thermal expansion depends on the distance from the center of the package, that is, the longer the distance, the greater the thermal expansion occurs at the connection terminal furthest from the center of the package. When this thermal stress is repeatedly applied to the connection terminals due to the operation / stop of the semiconductor element, the conductor connecting the insulating substrate and the external circuit board gradually fatigues and eventually breaks. In particular, the above tendency is remarkable in the surface mount type packages such as the QFP, LCC, BGA, and LGA.

The thermal stress generated in the connection terminal is a shear stress and depends on the height of the connection terminal. As the height of the connection terminal increases, the thermal stress tends to decrease. Therefore, in the BGA type package, it has been proposed to reduce the thermal stress by changing the size of the ball and the like.

On the other hand, in the LGA type package in which the land portion of the package and the land portion of the external circuit board are directly connected by soldering without using a ball-shaped terminal or the like, the height can be easily reduced. This has the advantage that the ball mounting process can be omitted. On the other hand, since the height of the connection portion is significantly lower than that of the BGA type package, a large thermal stress is generated, and the land portion of the package and the land portion of the external circuit board are generated. There is a problem that stable electrical connection cannot be established for a long time.

In addition, there is a tendency to reduce the thickness of the insulating substrate in response to the demand for small and low-profile packages. However, a semiconductor device having a lid made of thermosetting resin, metal, or ceramics joined to the surface of the insulating substrate. In a wire-bonding type package that is hermetically sealed, deformation of the insulating substrate is suppressed by a thermosetting resin or lid that has a large thermal expansion coefficient for sealing. There is a problem that stress is concentrated and electrical connection cannot be stably performed.

Therefore, according to the present invention, when a package is mounted on an external circuit board, thermal stress generated in a connection portion due to a difference in thermal expansion between the package and the external circuit board is reduced, and the package is connected to the external circuit board for a long time. An object of the present invention is to provide a mounting structure of a wiring board that can maintain a strong and stable connection state, and that can reduce the height and the density of lands.

[0016]

The inventor of the present invention has conducted various studies on a method of reducing the thermal stress generated at the connection portion due to the difference in thermal expansion between a wiring board such as a package and an external circuit board. By controlling the Young's modulus of the board and its thickness, the difference in thermal expansion between the insulating board and the external circuit board, and the thickness of the conductor connecting the insulating board and the external circuit board to a specific range, the thermal stress generated at the connecting part can be reduced. It has been found that the above-mentioned object can be achieved, and the present invention has been achieved.

That is, a wiring board according to the present invention comprises: a ceramic insulating substrate having a semiconductor element flip-chip mounted on one surface; a plurality of first lands provided on the other surface of the insulating substrate; A metallized wiring layer for electrically connecting the semiconductor element and the land portion;
In a wiring board formed by printing and coating a brazing material on the surface of the land portion, the insulating substrate may have a thickness of Ext ³ ≦ 30 (GPa ·
mm ³ ) (where, E: Young's modulus of the insulating substrate (GPa),
t: the thickness (mm) of the insulating substrate).

Further, according to the wiring board mounting structure of the present invention, a ceramic insulating substrate having a semiconductor element flip-chip mounted on one surface and a plurality of first insulating substrates provided on the other surface of the insulating substrate are provided. A second land portion is covered on a surface of an insulator containing an organic resin by mounting a wiring board including a land portion and a metallized wiring layer for electrically connecting the semiconductor element and the land portion. A mounting structure of a wiring board, which is mounted on a mounted external circuit board, and the first land of the wiring board and the second land of the external circuit board are bonded with a brazing material. The insulating substrate of the wiring substrate is E × t ³ ≦ 30 (GPa · mm
³ ) (where, E: Young's modulus (GPa) of the insulating substrate, t:
The thickness of the insulating substrate (mm)), the difference in thermal expansion between the insulating substrate and the insulator is 10 ppm / ° C. or less, and the solder between the first land portion and the second land portion. The thickness of the material is 0.3 mm or less.

In such a wiring board and its mounting structure, it is desirable that the insulating substrate is made of a glass ceramic sintered body or an alumina sintered body. The thermal expansion coefficient satisfies the relationship of the semiconductor element <insulating substrate <insulator.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the accompanying drawings showing an embodiment. FIG. 1 shows an example of a mounting structure of a wiring board according to the present invention. A semiconductor element having a so-called wiring board as a basic structure in which a metallized wiring layer is provided on the surface or inside of a ceramic insulating substrate is flip-chip mounted. FIG. 2 is a schematic cross-sectional view for explaining a structure when the LGA type package A is mounted on an external circuit board B.

According to FIG. 1, a package A includes a ceramic insulating substrate 1, a metallized wiring layer 2, a land 3
And a semiconductor element 4. The semiconductor element 4 includes a metallized wiring layer 2 disposed on the surface of the ceramic insulating substrate 1.
Is electrically connected to the semiconductor element 4 via the small flip-chip terminal 5 made of a metal such as solder or gold or a conductive resin. It is hermetically sealed by an underfill agent 6 made of a resin filled in a gap between them.

On the other hand, a land portion 3 is formed on the back surface of the insulating substrate 1, and is electrically connected to the flip chip terminal 5 of the semiconductor element 4 via the metallized wiring layer 2 disposed on the surface and inside of the insulating substrate 1. Connected.

On the other hand, the external circuit board B is made of a so-called printed board, and Cu, Au, Al, Al, Al, and Al are formed on the surface of an insulator 8 made of a material containing an organic resin such as a glass-epoxy resin or a glass-polyimide resin composite material. Ni, Sn-P
A land portion 9 for mounting a package A made of a metal such as b is formed.

In order to mount the package A on the printed board B, a brazing material such as solder is applied to the land 3 on the back surface of the insulating substrate 1 of the package A and / or the surface of the land 9 of the printed board B. Then, after the package A is positioned and placed so that the land 3 and the land 9 are in contact with each other, the solder is melted by performing a reflow process as it is, and the land 3 and the land 9 are soldered. The package A is mounted on the printed circuit board B by being electrically connected by a material 7 (hereinafter, referred to as a solder 7).

In this mounting structure, when the semiconductor element 4 mounted on the surface of the package A after mounting is repeatedly operated, the land 3 on the package A and the land 9 on the printed board B are electrically connected. A thermal stress is generated in the solder 7 due to a difference in thermal expansion between the package A and the printed board B.

Since the difference in thermal expansion between the package A and the printed circuit board B increases with the distance from the center of the package A, the solder 7a farthest from the center of the package A among the many solders 7 arranged on the array. The highest thermal stress will occur. As a result, the operation of the semiconductor element 4
When the thermal stress is repeatedly applied due to the stop, the solder 7a farthest from the center of the package A is broken after fatigue, and the electrical connection between the land 3 and the land 9 cannot be maintained.

The thermal stress generated in the solder 7 is a shear thermal stress caused by a difference in thermal expansion between the package A and the printed board B. Therefore, the thermal stress can be reduced as the thickness Y of the solder 7 is increased. Therefore, in the conventional connection structure of a package, a method of increasing the thickness of the solder 7 has been devised.

As a method of reducing the thermal stress, there is a method of reducing the difference in thermal expansion between the package A and the printed board B. Even if the thickness Y of the solder 7 is small, the package A
If the difference in thermal expansion between the substrate and the printed board B is small, the thermal stress will be small.

When the semiconductor element of the conventional package is repeatedly operated, if the rigidity of the insulating substrate is high, the package itself does not deform at all, so that it is impossible to reduce the difference in thermal expansion due to the deformation. Therefore, the thermal expansion difference is determined by the original thermal expansion difference of the material of the insulating substrate 1 of the package A and the insulator 8 of the printed board B, and the only way to reduce the thermal stress is to increase the thickness Y of the solder 7.

On the other hand, according to the present invention, as a result of examining the conditions for obtaining a highly reliable connection structure between the land portions, first, the insulating substrate 1 is made to have a thickness of E × t ³ ≦ 30 (G
Pa · mm ³ ) (where E: Young's modulus of insulating substrate (GP
a), t: a low-rigidity insulating substrate that satisfies the thickness (mm) of the insulating substrate. Second, the thermal expansion difference Δα = α ₂ − between the insulating substrate 1 of the package A and the insulator 8 of the printed board B. α ₁
When (α ₁ : coefficient of thermal expansion of the insulating substrate 1, α ₂ : coefficient of thermal expansion of the insulator 8) satisfies the condition of 10 ppm / ° C. or less, the smaller the thickness Y of the solder 7, the more heat generated in the solder 7 There is a specific tendency that stress is reduced.

FIG. 3 is a view for explaining this principle, and shows a modified view of the mounting structure when the semiconductor element 4 having the mounting structure shown in FIG. 1 is repeatedly operated. In this drawing, it is assumed that the thermal expansion coefficient is in the order of semiconductor element 4 <insulating substrate 1 <insulator 8. In such a relationship, when the temperature rises, the semiconductor element 4, the package A, and the external circuit board B are all warped so that the mounting surface of the semiconductor element 4 is concave as shown in FIG. Due to this deformation, the difference in thermal expansion between the package A and the printed board B is reduced.

At this time, if the insulating substrate 1 is a low-rigidity insulating substrate satisfying the above-described relationship, the package A
Becomes large, and together with the printed circuit board B, the center becomes the same X.

If the radii of curvature of the lower surface of the package A and the radius of curvature of the upper surface of the printed circuit board B are r ₁ and r ₂ , respectively, the solder 7 a farthest from the center X of the package A is approximately θ × (r ₂ -r). _The difference in thermal expansion of ₁ ) is added.
Therefore, when the low-rigidity insulating substrate 1 capable of deformation as shown in FIG. 3 is used, the smaller the r ₂ -r ₁ , that is, the smaller the thickness Y of the solder 7, the smaller the thermal expansion difference. And the thermal stress is reduced.

From this viewpoint, according to the present invention, the solder 7
By setting the thickness Y to 0.3 mm or less, the effect can be exhibited most, and the height of the entire mounting structure can be reduced, and the connection reliability can be enhanced for a long period of time.

In the present invention, if the value of E × t ³ is larger than 30 (GPa · mm ³ ), the package A has high rigidity and cannot be sufficiently warped and deformed. The radius of curvature of the upper surface of the printed circuit board B differs greatly. Further, if the thickness Y of the solder 7 is larger than 0.3 mm, the thermal expansion difference of θ × (r ₂ −r ₁ ) = θ × Y becomes large, and stable connection cannot be maintained for a long time. Would. Ext ³ is 10 (GP
a · mm ³ ) is particularly desirable. The optimum value of the thickness Y of the solder 7 is 0.2 mm or less.

As a method for reducing the thickness Y of the solder 7 to 0.3 mm or less, when a BGA type mounting in which a solder ball is placed and melted is performed, the thickness Y becomes large. And / or LG which applies solder paste to land portion 9 by screen printing or the like and melts it.
An A-type mounting method is desirable.

Further, according to the present invention, in the package A, when a cover made of a thermosetting resin, metal, or ceramics is covered on the surface of the insulating substrate 1 so as to cover the semiconductor element 4, the package A is bonded. Warpage is suppressed by the lid and cannot be sufficiently distorted, and the deformation as shown in FIG. 3 cannot be performed.

However, according to the present invention, the package A needs to be a package in which the semiconductor element 4 is flip-chip mounted as shown in FIG.

If the thermal expansion difference between the package A and the printed circuit board B is extremely large, even if the package A is distorted, the thermal expansion difference between the printed circuit board B and the package A cannot be reduced by the above-described deformation. Therefore, the mounting structure of the present invention is:
Thermal expansion coefficient difference Δα = α between package A and printed circuit board B
_{This is applied when 2−} α ₁ (α ₁ : coefficient of thermal expansion of the insulating substrate 1, α ₂ : coefficient of thermal expansion of the insulator 8) is 10 ppm / ° C. or less. The coefficient of thermal expansion of the external circuit board at this time means a coefficient of thermal expansion of the resin in the insulator 8 at a glass transition temperature Tg or lower.

As a wiring board material having such characteristics, for example, lithium silicate glass, PbO-based glass, and Z as described in the specification of JP-A-10-167822
A glass component such as nO-based glass or BaO-based glass is mixed with various ceramic fillers such as enstatite, forsterite, SiO ₂ -based filler, MgO, ZrO ₂ , petalite, molded, and then fired. .

For example, a slurry is prepared by appropriately adding an organic binder to a mixture of 20 to 90% by volume of the glass and 80 to 10% by volume of the filler, and the slurry is formed into a sheet. C on the body surface
A conductive paste containing a low-resistance metal such as u, Au, or Ag is applied by printing. Further, if necessary, a through hole is formed at a predetermined position of the sheet-like molded body by a micro drill, a laser, or the like, and the hole is filled with the conductive paste.
Then, after a plurality of the sheet-shaped molded bodies are laminated and pressed to produce a laminated body, the laminated body is degreased in a nitrogen atmosphere or a nitrogen atmosphere containing water vapor, and then fired at a temperature of 800 to 1000 ° C. Can be.

[0042]

EXAMPLES For various ceramic materials shown in Table 1,
After preparing sintered bodies having a shape of 5 × 4 × 40 mm, the Young's modulus and the coefficient of thermal expansion at 40 to 400 ° C. of each sintered body were measured and are shown in Table 1.

Using various ceramic materials shown in Table 1 as an insulating substrate, a metallized wiring layer connected to a semiconductor element, an internal wiring layer and a via hole conductor on the surface thereof, and 256 lands for attaching a conductor to the bottom surface. The portions were simultaneously fired by printing or filling a paste in accordance with a well-known method to produce a package substrate.

As the conductor materials, A to F and I in Table 1 were used.
Is fired at 950 ° C. using Cu (copper), and G,
H was produced by firing at 1600 ° C. using W (tungsten). Then, solder (S
(n63% by weight, Pb 37% by weight) paste was applied by screen printing, and heated and melted to form a solder layer. The lands were formed on the entire lower surface at 1.0 mm intervals.
The thickness t of the package is 0.6, 0.4, 0.2 mm3.
Types were made.

On the other hand, as a printed circuit board, a printed circuit board made of a glass-epoxy substrate having a land portion made of copper foil formed on the surface of an insulator having a thermal expansion coefficient of 15 ppm / ° C. below the glass transition temperature was prepared. Then, solder (Sn 63% by weight, P
b37% by weight) After the paste is applied by screen printing, solder balls are appropriately placed, the lands of the package are aligned with the lands of the printed circuit board, and the package is heated and melted at 230 ° C. to form a package. Mounted on a printed circuit board.

When manufacturing a package mounting structure having a solder thickness of 0.1 mm, solder paste is not printed on the package side, but solder paste is printed only on the printed circuit board side. When fabricating a package mounting structure of 0.3 mm, solder paste was printed on both the lands on the package and the printed circuit board.
When producing a package mounting structure having a solder thickness of 0.5 mm, solder balls were placed, heated and melted, and mounted, in addition to printing the solder paste.

Next, the package substrate mounted on the printed circuit board surface as described above was placed in an air atmosphere.
A maximum of 2 cycles of a test sample held in a thermostat controlled at each temperature of 40 ° C and 125 ° C for 15 minutes / 15 minutes.
Repeated up to 000 cycles. The electrical resistance between the wiring conductor of the printed circuit board and the package substrate was measured every 100 cycles, and the number of cycles until the electrical resistance changed was shown in Tables 2 and 3.

[0048]

[Table 1]

[0049]

[Table 2]

[0050]

[Table 3]

As is clear from Tables 1 to 3, E × t ³
Is 30 (GPa · mm ³ ) or less, and the thermal expansion difference Δα between the insulating substrate and the printed circuit board is 10
In the package mounting structure of ppm / ° C. or less, even if the thickness of the solder was 0.3 mm or less, no change in resistance was observed at all up to 1000 cycles, and an extremely stable and favorable electrical connection state could be maintained.

However, in a package outside the above range, a change in resistance was detected at an early stage of less than 1000 cycles, and it was found that reliability after mounting was lacking.

[0053]

As described in detail above, according to the present invention,
When a wiring board on which a semiconductor element such as a package is mounted is mounted on an external circuit board such as a printed circuit board having a larger coefficient of thermal expansion, the thermal stress generated due to the difference between the two coefficients of thermal expansion is small, and Since the thermal stress can be relieved by the deformation of the package, the height of the package and the external circuit board can be reduced, and the electrical connection can be made accurately and firmly for a long period of time.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view for explaining a mounting structure of a wiring board according to the present invention.

FIG. 2 is an enlarged sectional view of a main part of a connection part in the mounting structure of FIG.

FIG. 3 is a schematic cross-sectional view for explaining a deformation in the mounting structure of the wiring board according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Ceramic insulating substrate 2 Metallized wiring layer 3 Land part 4 Semiconductor element 5 Flip chip terminal 6 Underfill 7 Solder (brazing material) 8 Insulator 9 Land part A Package B External circuit board

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05K 1/18 H01L 23/12 C

Claims (5)

[Claims] 1. A ceramic insulating substrate having a semiconductor element flip-chip mounted on one surface, a plurality of first lands provided on the other surface of the insulating substrate, the semiconductor element and the land. And a metallized wiring layer for electrically connecting the wiring board to each other. The wiring board is formed by printing and coating a brazing material on the surface of the land portion, wherein the insulating substrate has a thickness of Ext ³ ≦ 30 (GPa · mm ³ ).
(Wherein E: Young's modulus (GPa) of the insulating substrate, t: thickness (mm) of the insulating substrate). 2. The wiring board according to claim 1, wherein said insulating substrate is made of a glass ceramic sintered body or an alumina sintered body. 3. A ceramic insulating substrate having a semiconductor element flip-chip mounted on one surface, a plurality of first lands provided on the other surface of the insulating substrate, the semiconductor element and the land. And a metallized wiring layer for electrically connecting the wiring board to an external circuit board having a second land portion formed on the surface of an insulator containing an organic resin. A mounting structure of the wiring board, wherein the first land portion of the wiring board and the second land portion of the external circuit board are bonded with a brazing material; ³ ≤ 30 (GPa
mm ³ ) (where, E: Young's modulus of the insulating substrate (GPa),
t: the thickness (mm) of the insulating substrate), the difference in thermal expansion between the insulating substrate and the insulator is 10 ppm / ° C. or less, and between the first land portion and the second land portion. The mounting structure of a wiring board, wherein the thickness of the brazing material is 0.3 mm or less. 4. The mounting structure for a wiring board according to claim 3, wherein said insulating substrate is made of a glass ceramic sintered body or an alumina sintered body. 5. The mounting structure according to claim 3, wherein a coefficient of thermal expansion satisfies a relationship of the semiconductor element <insulating substrate <insulator.