JP4646642B2 - Package for semiconductor devices - Google Patents

Description

  The present invention relates to a package for a semiconductor element in which a semiconductor element is placed on the surface of a resin wiring board.

  FIG. 3 shows a semiconductor device package having a conventional structure. The semiconductor element package is a so-called BGA (Ball Grid Array) type semiconductor element package. The wiring board 92, the semiconductor element 91 flip-chip connected to the wiring board 92 via solder bumps 94, and the semiconductor A highly heat-conductive lid 93 is provided on the surface of the wiring substrate 92 so as to cover the element 91 and a part thereof is bonded to the upper surface of the semiconductor element 91.

  Specifically, a plurality of solder bumps 94 are formed on the bottom surface of the semiconductor element 91, and the solder bump 94 is melted to flip-chip the semiconductor element 91 onto the metallized wiring layer formed on the surface of the wiring substrate 92. By connecting, the semiconductor element is mounted on the wiring board 92.

  The high thermal conductivity lid 93 is a flat plate made of a metal material having high thermal conductivity such as copper or aluminum, and is disposed so as to cover the entire wiring substrate 92, and has high thermal conductivity with the semiconductor element 91. It is bonded with a resin adhesive. The high thermal conductive lid 93 has a function as a heat radiating plate for radiating heat generated in the semiconductor element 91.

A filler resin (underfill) 95 made of a thermosetting resin such as an epoxy resin is provided around the solder bumps 94 in order to relieve thermal stress applied to the solder bumps 94. In addition, solder balls 96 serving as connection terminals with an external circuit board (not shown) are provided on the back surface of the wiring board 92, and the semiconductor element 91 is formed by a metallized wiring layer formed on the surface and inside of the wiring board 92. Are electrically connected to each other (see, for example, Patent Document 1).
JP 2001-244390 A

Here, the thermal expansion coefficient of the semiconductor element mainly composed of silicon is about 3 × 10 ⁻⁶ / ° C., whereas the thermal expansion coefficient of the wiring substrate is 8 to 20 × 10 ⁻⁶ / ° C. The difference in thermal expansion coefficient is large.

  Therefore, for example, when a temperature change of −55 ° C. to 125 ° C. is given during a temperature cycle test, the semiconductor element and the wiring board tend to be warped. However, since the semiconductor element is bonded and fixed to the lid, the semiconductor element mounting portion cannot be warped and a region other than the semiconductor element mounting portion is greatly warped. At this time, a very high stress is generated in the vicinity of the corner portion of the semiconductor element 91 of the wiring board 92, so that the wiring board 92 may be cracked and the internal wiring may be disconnected.

  As the operating frequency of semiconductor devices increases, the wiring board tends to be thinner and the wiring length in the wiring board tends to be shortened, and the wiring board is made of glass fiber epoxy resin to reduce product costs. There is a tendency to use a resin having a high coefficient, and as a result, the problem of cracks in the wiring board has become prominent.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a package for a semiconductor element, in which a crack is not generated in a resin wiring board and the stress is relaxed.

  As a result of various studies on methods for reducing the thermal stress generated due to the difference in thermal expansion between the resin wiring board and the external circuit board, the present inventors have provided a recess having a predetermined area in the center of the lid. The present inventors have found that thermal deformation can be reduced without hindering warpage deformation of the element mounting portion, and stable mounting can be achieved over a long period of time.

That is, the present invention includes a resin wiring board, a semiconductor element flip-chip connected to the resin wiring board via a solder bump, and is attached to the surface of the resin wiring board so as to cover the semiconductor element. A semiconductor device comprising: a highly thermally conductive lid part of which is bonded to the upper surface of the semiconductor element; and a connection terminal provided on the back surface of the resin wiring board and electrically connected to the semiconductor element. In the package, a concave portion having an area smaller than the bonding surface and 50% or more of the bonding area is provided at a substantially central portion of the bonding surface with the semiconductor element in the high thermal conductivity lid. A package for a semiconductor element, which is filled with a conductive resin. As a result, the warp deformation of the semiconductor element mounting portion of the resin wiring board is not hindered, so even if there is a difference in thermal expansion between the semiconductor element and the resin wiring board, the thermal stress generated in the resin wiring board is reduced. can do.

  Here, the recess preferably has a depth of 50 to 300 μm. Thereby, the heat dissipation of a preferable grade is securable.

  The high thermal conductivity lid includes a lid provided on the top surface and a stiffener joined to the peripheral edge of the lid in a skirt shape, and the lid is in contact with the inner layer and the semiconductor element. It is preferable that the concave portion is formed of a through hole formed in the inner layer. This is advantageous in terms of cost and easier to manufacture than forming the recesses by a method such as machining, pressing, or casting.

  Furthermore, it is preferable that the high thermal conductive resin is mainly composed of polyphenylene sulfide. Since polyphenylene sulfide has extremely good thermal conductivity as compared with other resins, the heat dissipation in the present invention can be further improved.

  In addition, as a highly heat-conductive cover body, what consists of 1 type in Cu, Al, Al-SiC composite material, Cu-W alloy, Cu-Cr alloy, and Fe-Ni-Co alloy is mentioned.

As described above in detail, semiconductor element package of the present invention, the site of deposition and the semiconductor device contact high thermal conductivity lid, by providing a predetermined size recess for not inhibit warping deformation, occurs Therefore, even when a difference in thermal expansion occurs between the semiconductor element and the resin wiring board, the electrical connection can be made accurately and firmly over a long period of time.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a cross-sectional view showing an embodiment of the present invention. A semiconductor element package of the present invention is flip-chip connected to a resin wiring board 2 and solder bumps 5 on the resin wiring board 2. A semiconductor element 1, a high thermal conductive lid that is attached to the surface of the resin wiring board 2 so as to cover the semiconductor element 1 and a part thereof is bonded to the upper surface of the semiconductor element 1, and a resin wiring board 2 A package for a semiconductor element provided with a connection terminal (solder ball 7) provided on the back surface and electrically connected to the semiconductor element 1, wherein the bonding surface of the high thermal conductivity lid to the semiconductor element is A concave portion having an area of 50% or more of the bonding area is provided in a substantially central portion, and the concave portion is filled with a high thermal conductive resin.

The resin wiring board 2 has connection patterns (not shown) formed on the front and back surfaces of a substrate made of a material containing an organic resin such as glass-epoxy resin or glass-polyimide resin composite material, and these connections are made inside the substrate. A via hole for electrically connecting the patterns is provided, and this coefficient of thermal expansion is about 12 to 18 × 10 ⁻⁶ / ° C.

The semiconductor element 1 is mainly made of silicon and has a thermal expansion coefficient of about 3 × 10 ⁻⁶ / ° C. A plurality of connection electrodes (not shown) are provided on the bottom surface of the semiconductor element 1, and are connected to a connection pattern provided on the surface of the resin wiring board 2 via solder bumps 5. That is, the semiconductor element 1 is mounted on the resin wiring board 2 by melting the solder bumps 5 and performing flip chip connection to a connection pattern formed on the surface of the resin wiring board 2. Here, the solder bump 5 is preferably a solder having a relatively high melting point containing, for example, 90% or more of lead, thereby preventing remelting due to heating when mounted on an external circuit board (not shown). . The solder bump 5 is filled with an underfill 6 made of a thermosetting resin, and the stress is relaxed by receiving the stress applied to the solder bump 5 in a wider area.

  On the surface of the resin wiring board 2, a high thermal conductive lid (lid 3, stiffener 4) is attached. Specifically, a highly heat-conductive lid comprising a lid 3 provided on the top surface so as to cover the semiconductor element 1 and a stiffener 4 joined to the peripheral edge of the lid 3 in a skirt shape, It is adhered and fixed to the surface of the resin wiring board 2. The stiffener 4 has a role of increasing the mechanical stability of the lid 3. The lid 3 is bonded to the upper surface of the semiconductor element 1 with a high thermal conductive adhesive. Here, at least the lid 3 of the high thermal conductivity lid is a material having high thermal conductivity made of Cu, Al, Al—SiC composite material, Cu—W alloy, Cu—Cr alloy, Fe—Ni—Co alloy or the like. It is formed by. Further, the high thermal conductive adhesive has a function of thermally and mechanically connecting the lid 3 and the semiconductor element 1, and is a resin paste containing a metal filler (for example, silver) or a non-metal filler (for example, silicon). A material having a high thermal conductivity and a strong adhesive force such as a resin paste or brazing material (for example, solder) can be suitably used. The stiffener 4 is bonded to the lid 3 with the above high thermal conductive adhesive or epoxy adhesive, and is bonded to the resin wiring board 2 with the same adhesive, but the resin wiring board 2 Alternatively, it may be integrally formed with the lid 3 in advance.

A solder ball 7 serving as a connection terminal to an external circuit board (not shown) is provided on the back surface of the resin wiring board 2. The solder ball 7 and the semiconductor element 1 are connected to the resin wiring board 2. Are electrically connected via a connection pattern formed on the surface, via holes formed inside the resin wiring board 2 and connection patterns formed on the surface of the resin wiring board 2. Here, as the solder ball 7, it is preferable to use a material having a melting point lower than that of the solder bump 5 , specifically, a tin-lead solder alloy.

Then, a substantially central portion of the bonding surface of the semiconductor element 1 in the lid 3, the recess 31 of more than 50% of the area of the contact adhesive area is provided between the semiconductor element 1, a semiconductor device of a resin wiring board 2 1 It has a structure that does not hinder the warp deformation of the mounting portion. Here, the area of the recess 31, in terms of stable fixation and heat dissipation, must be smaller in area than contact adhesive surface of the semiconductor element 1, the semiconductor element 1 mounted in or tree butter manufactured wiring board 2 so as not to inhibit the warpage of parts is required to be 50% or more of the contact adhesive area of the semiconductor element 1. Moreover, it is preferable that this recessed part 31 has a depth of 50-300 micrometers. By defining the depth within such a numerical range, there is an effect of achieving both stress relaxation due to warpage and heat dissipation. That is, a desirable degree of heat dissipation can be ensured in cooperation with the high thermal conductive resin 311 described later.

  Further, the recess 31 is filled with a high thermal conductive resin 311. Here, the high thermal conductivity preferably means a material having a thermal conductivity of about 2 to 30 W / m · K. Thus, by filling the concave portion 31 with the high thermal conductive resin 311, it is possible to solve the problem that the heat dissipation due to the formation of the concave portion 31 is reduced. As this high thermal conductive resin 311, an epoxy resin, a silicone resin, a resin such as grease based on polyalphaolefin, a metal filler such as aluminum or copper, and an inorganic filler such as alumina, aluminum nitride, or boron nitride are mixed. In particular, a resin containing polyphenylene sulfide as a main component or a mixture of this with the above filler can be preferably used because of its very good thermal conductivity.

  The recess 31 shown in FIG. 1 can be formed by a method such as cutting, pressing, or casting. However, forming the recess 31 in the lid 3 by such a method requires a lot of processing time. Therefore, as shown in FIG. 2, a method in which the lid 3 has a multilayer structure can also be preferably employed.

  In the semiconductor element package shown in FIG. 2, the lid 3 includes an inner layer 32 that contacts the semiconductor element 1 and an outer layer 33 that does not contact the semiconductor element 1. The lid 3 (inner layer 32 and outer layer 33) is formed of a material having high thermal conductivity made of Cu, Al, Al—SiC composite material, Cu—W alloy, Cu—Cr alloy, Fe—Ni—Co alloy or the like. ing. Here, a through-hole 321 having a cross-sectional area of 50% or more of the adhesion area is formed at a substantially central portion of the inner layer 32 on the adhesion surface with the semiconductor element 1. The outer layer 33 is a flat plate member in which no through hole is formed. With such a configuration in which the inner layer 32 and the outer layer 33 are combined, a structure in which a recess having an area of 50% or more of the bonding area with the semiconductor element 1 is provided. Here, in consideration of heat dissipation, the thickness of the inner layer 32 is preferably 50 to 300 μm, thereby providing a structure in which a recess having a depth of 50 to 300 μm is provided. In addition, it is also possible to adjust required heat dissipation performance and production cost by making the material of the inner layer 32 and the outer layer 33 different.

  By adopting such a structure shown in FIG. 2, the same effect as the structure shown in FIG. 1 can be obtained at low cost. That is, it is cheaper to form the through holes 321 than to form the recesses 31 in the lid 3, and the fabrication is easy.

  The semiconductor element package of the present invention may have a structure in which heat radiating fins 8 as shown in FIG. 2 are attached in order to further improve heat dissipation.

  Thus, in the package for a semiconductor element of the present invention, a recess having a desired area is provided on the upper part of the semiconductor element in the high thermal conductivity lid so as not to inhibit the warp deformation of the semiconductor element mounting portion of the resin wiring board. Therefore, even when a difference in thermal expansion occurs between the semiconductor element and the resin wiring board, the thermal stress generated in the resin wiring board can be reduced.

As an example, a package for a semiconductor device having the structure shown in FIG. 1 was prepared. Specifically, the semiconductor element 1 is 17 mm square and 0.7 mm thick, the wiring board 2 is 45 mm square and 0.7 mm thick, and the lid 3 is 45 mm square and 0 mm thick. .5 mm, the size of the stiffener 4 is 40 mm square, 31 mm square opening, and 0.7 mm thick. Then, the contact bonding surface central portion of the semiconductor element 1 of the lid 3, the recess opening diameter shown in Table 1 (the length of the square side) and a recess 31 of depth 0.2 mm. Then, the concave portion 31 was filled with a high thermal conductive resin in which 50 vol% of alumina filler was mixed with polyphenylene sulfide resin.

  Here, a sample having a recess area of 50% or more with respect to the adhesion area with the semiconductor element was used as a sample No. 2 and 3.

  In addition, as a comparative example, a sample having no recess is sample No. 1. A sample having a recess area of less than 50% with respect to the adhesion area with the semiconductor element is designated as Sample No. 4-7.

These samples were repeated in a constant temperature bath controlled at −55 ° C. and 125 ° C. in an air atmosphere for a maximum of 3500 cycles with 25 minutes / 25 minutes held as one cycle. Then, the electrical resistance between the wiring conductor of the external circuit board and the resin wiring board was measured every 100 cycles, and the number of cycles until a change appeared in the electrical resistance was measured. The results are shown in Table 1.

  As is clear from Table 1, the package for semiconductor elements of the present invention (Sample Nos. 2 and 3) did not show any change in resistance until 3000 cycles, and was able to maintain an extremely stable and good electrical connection state. However, a sample No. having no recess, which is outside the scope of the present invention. 1. Sample No. having an area ratio of less than 50% to the adhesion area of the recess area to the semiconductor element. 4 to 7, it was found that resistance change was detected from an early stage of less than 3000 cycles, and the reliability after mounting was lacking.

1 is a cross-sectional structure diagram of an embodiment of a package for a semiconductor device of the present invention. It is sectional structure drawing of other embodiment of the package for semiconductor elements of this invention. It is sectional structure drawing of the conventional package for semiconductor elements.

Explanation of symbols

1: Semiconductor element 2: Resin wiring board 3: Lid 31: Recess 311: High thermal conductive resin 32: Inner layer 321: Through hole 33 Outer layer 4: Stiffener 5: Solder bump 6: Underfill (filling resin)
7: Solder balls

Claims (5)

A resin wiring board; a semiconductor element flip-chip connected to the resin wiring board via solder bumps; and a part of the resin wiring board attached to the surface of the resin wiring board so as to cover the semiconductor element A package for a semiconductor element, comprising: a highly thermally conductive lid bonded to the upper surface of the semiconductor element; and a connection terminal provided on the back surface of the resin wiring board and electrically connected to the semiconductor element, A recess having an area smaller than the bonding surface and 50% or more of the bonding area is provided at a substantially central portion of the bonding surface with the semiconductor element in the high thermal conductive lid , and the concave portion is filled with a high thermal conductive resin. A package for a semiconductor device, characterized in that   2. The package for a semiconductor device according to claim 1, wherein the recess has a depth of 50 to 300 [mu] m.   The high thermal conductive lid includes a lid provided on the top surface, and a stiffener joined to the peripheral edge of the lid in a skirt shape, and the lid is in contact with the semiconductor element and the outer layer is not in contact with the semiconductor element 3. The package for a semiconductor device according to claim 1, wherein the recess is a through hole formed in the inner layer.   The package for a semiconductor device according to any one of claims 1 to 3, wherein the high thermal conductive resin contains polyphenylene sulfide as a main component.   The semiconductor according to any one of claims 1 to 4, wherein the high thermal conductive lid is made of one of Cu, Al, Al-SiC composite material, Cu-W alloy, Cu-Cr alloy, and Fe-Ni-Co alloy. Device package.

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