JP2001077232A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JP2001077232A
JP2001077232A JP25130799A JP25130799A JP2001077232A JP 2001077232 A JP2001077232 A JP 2001077232A JP 25130799 A JP25130799 A JP 25130799A JP 25130799 A JP25130799 A JP 25130799A JP 2001077232 A JP2001077232 A JP 2001077232A
Authority
JP
Japan
Prior art keywords
lead
thin
electrodes
semiconductor chip
resin layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25130799A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001077232A5 (https=
Inventor
Ryoji Takahashi
良治 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP25130799A priority Critical patent/JP2001077232A/ja
Priority to US09/629,899 priority patent/US6650012B1/en
Publication of JP2001077232A publication Critical patent/JP2001077232A/ja
Priority to US10/663,940 priority patent/US6790711B2/en
Publication of JP2001077232A5 publication Critical patent/JP2001077232A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H05K3/3426—Leaded components characterised by the leads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/042—Etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5366—Shapes of wire connectors the bond wires having kinks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP25130799A 1999-09-06 1999-09-06 半導体装置およびその製造方法 Pending JP2001077232A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP25130799A JP2001077232A (ja) 1999-09-06 1999-09-06 半導体装置およびその製造方法
US09/629,899 US6650012B1 (en) 1999-09-06 2000-07-31 Semiconductor device
US10/663,940 US6790711B2 (en) 1999-09-06 2003-09-17 Method of making semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25130799A JP2001077232A (ja) 1999-09-06 1999-09-06 半導体装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007238774A Division JP4840305B2 (ja) 2007-09-14 2007-09-14 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2001077232A true JP2001077232A (ja) 2001-03-23
JP2001077232A5 JP2001077232A5 (https=) 2006-10-19

Family

ID=17220868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25130799A Pending JP2001077232A (ja) 1999-09-06 1999-09-06 半導体装置およびその製造方法

Country Status (2)

Country Link
US (2) US6650012B1 (https=)
JP (1) JP2001077232A (https=)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100445072B1 (ko) * 2001-07-19 2004-08-21 삼성전자주식회사 리드 프레임을 이용한 범프 칩 캐리어 패키지 및 그의제조 방법
CN1298203C (zh) * 2002-12-03 2007-01-31 三洋电机株式会社 电路装置
JP2008091528A (ja) * 2006-09-29 2008-04-17 Sanyo Electric Co Ltd 半導体装置の製造方法及び半導体装置
JP2009188149A (ja) * 2008-02-06 2009-08-20 Sanyo Electric Co Ltd 回路装置およびその製造方法
US8829685B2 (en) 2009-03-31 2014-09-09 Semiconductor Components Industries, Llc Circuit device having funnel shaped lead and method for manufacturing the same
JP2019047112A (ja) * 2017-09-04 2019-03-22 ローム株式会社 半導体装置
US20210376563A1 (en) * 2020-05-26 2021-12-02 Excelitas Canada, Inc. Semiconductor Side Emitting Laser Leadframe Package and Method of Producing Same

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4549491B2 (ja) * 2000-03-13 2010-09-22 大日本印刷株式会社 樹脂封止型半導体装置
JP4626919B2 (ja) * 2001-03-27 2011-02-09 ルネサスエレクトロニクス株式会社 半導体装置
JP4611569B2 (ja) * 2001-05-30 2011-01-12 ルネサスエレクトロニクス株式会社 リードフレーム及び半導体装置の製造方法
US20070108609A1 (en) * 2001-07-19 2007-05-17 Samsung Electronics Co., Ltd. Bumped chip carrier package using lead frame and method for manufacturing the same
JP2005243132A (ja) * 2004-02-26 2005-09-08 Renesas Technology Corp 半導体装置
US8039956B2 (en) * 2005-08-22 2011-10-18 Texas Instruments Incorporated High current semiconductor device system having low resistance and inductance
US7335536B2 (en) 2005-09-01 2008-02-26 Texas Instruments Incorporated Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices
KR100655082B1 (ko) * 2005-12-23 2006-12-08 삼성전자주식회사 상변화 메모리 소자 및 그 제조방법
KR100809702B1 (ko) * 2006-09-21 2008-03-06 삼성전자주식회사 반도체 패키지
US8084299B2 (en) 2008-02-01 2011-12-27 Infineon Technologies Ag Semiconductor device package and method of making a semiconductor device package
DE102008040488A1 (de) * 2008-07-17 2010-01-21 Robert Bosch Gmbh Elektronische Baueinheit und Verfahren zu deren Herstellung
JP5136458B2 (ja) * 2009-02-20 2013-02-06 ヤマハ株式会社 半導体パッケージ及びその製造方法
US20120168920A1 (en) 2010-12-30 2012-07-05 Stmicroelectronics, Inc. Leadless semiconductor package and method of manufacture
US8426254B2 (en) * 2010-12-30 2013-04-23 Stmicroelectronics, Inc. Leadless semiconductor package with routable leads, and method of manufacture
US9245819B2 (en) * 2012-02-22 2016-01-26 Freescale Semiconductor, Inc. Embedded electrical component surface interconnect
US8569112B2 (en) * 2012-03-20 2013-10-29 Stats Chippac Ltd. Integrated circuit packaging system with encapsulation and leadframe etching and method of manufacture thereof
US9312194B2 (en) 2012-03-20 2016-04-12 Stats Chippac Ltd. Integrated circuit packaging system with terminals and method of manufacture thereof
JP2015056540A (ja) * 2013-09-12 2015-03-23 株式会社東芝 半導体装置及びその製造方法
US9972558B1 (en) 2017-04-04 2018-05-15 Stmicroelectronics, Inc. Leadframe package with side solder ball contact and method of manufacturing
US10199312B1 (en) * 2017-09-09 2019-02-05 Amkor Technology, Inc. Method of forming a packaged semiconductor device having enhanced wettable flank and structure

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208756A (ja) 1983-05-12 1984-11-27 Sony Corp 半導体装置のパツケ−ジの製造方法
JPH02240940A (ja) * 1989-03-15 1990-09-25 Matsushita Electric Ind Co Ltd 集積回路装置の製造方法
JP2957335B2 (ja) * 1991-10-29 1999-10-04 ローム株式会社 リードフレームの製造方法
MY120226A (en) * 1992-05-25 2005-09-30 Hitachi Ulsi Eng Corp Thin type semiconductor device, module structure using the device and method of mounting the device on board.
JPH06163794A (ja) * 1992-11-19 1994-06-10 Shinko Electric Ind Co Ltd メタルコアタイプの多層リードフレーム
JP3383081B2 (ja) * 1994-07-12 2003-03-04 三菱電機株式会社 陽極接合法を用いて製造した電子部品及び電子部品の製造方法
US6159770A (en) * 1995-11-08 2000-12-12 Fujitsu Limited Method and apparatus for fabricating semiconductor device
TW351008B (en) * 1996-12-24 1999-01-21 Matsushita Electronics Corp Lead holder, manufacturing method of lead holder, semiconductor and manufacturing method of semiconductor
JPH1174404A (ja) 1997-08-28 1999-03-16 Nec Corp ボールグリッドアレイ型半導体装置
JP2813588B2 (ja) 1998-01-26 1998-10-22 新光電気工業株式会社 半導体装置およびその製造方法
JP3285815B2 (ja) * 1998-03-12 2002-05-27 松下電器産業株式会社 リードフレーム，樹脂封止型半導体装置及びその製造方法
JP3562311B2 (ja) * 1998-05-27 2004-09-08 松下電器産業株式会社 リードフレームおよび樹脂封止型半導体装置の製造方法
KR20000046445A (ko) * 1998-12-31 2000-07-25 마이클 디. 오브라이언 반도체 패키지

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100445072B1 (ko) * 2001-07-19 2004-08-21 삼성전자주식회사 리드 프레임을 이용한 범프 칩 캐리어 패키지 및 그의제조 방법
CN1298203C (zh) * 2002-12-03 2007-01-31 三洋电机株式会社 电路装置
JP2008091528A (ja) * 2006-09-29 2008-04-17 Sanyo Electric Co Ltd 半導体装置の製造方法及び半導体装置
JP2009188149A (ja) * 2008-02-06 2009-08-20 Sanyo Electric Co Ltd 回路装置およびその製造方法
US8829685B2 (en) 2009-03-31 2014-09-09 Semiconductor Components Industries, Llc Circuit device having funnel shaped lead and method for manufacturing the same
JP2019047112A (ja) * 2017-09-04 2019-03-22 ローム株式会社 半導体装置
JP7208725B2 (ja) 2017-09-04 2023-01-19 ローム株式会社 半導体装置
US20210376563A1 (en) * 2020-05-26 2021-12-02 Excelitas Canada, Inc. Semiconductor Side Emitting Laser Leadframe Package and Method of Producing Same

Also Published As

Publication number Publication date
US6790711B2 (en) 2004-09-14
US6650012B1 (en) 2003-11-18
US20040063252A1 (en) 2004-04-01

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