JP2000208614A - 半導体装置の製造方法及び半導体装置 - Google Patents
半導体装置の製造方法及び半導体装置Info
- Publication number
- JP2000208614A JP2000208614A JP11007759A JP775999A JP2000208614A JP 2000208614 A JP2000208614 A JP 2000208614A JP 11007759 A JP11007759 A JP 11007759A JP 775999 A JP775999 A JP 775999A JP 2000208614 A JP2000208614 A JP 2000208614A
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating film
- forming
- semiconductor device
- soi substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76291—Lateral isolation by field effect
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
- Thin Film Transistor (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11007759A JP2000208614A (ja) | 1999-01-14 | 1999-01-14 | 半導体装置の製造方法及び半導体装置 |
| US09/325,644 US6436792B1 (en) | 1999-01-14 | 1999-06-04 | Method of manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11007759A JP2000208614A (ja) | 1999-01-14 | 1999-01-14 | 半導体装置の製造方法及び半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000208614A true JP2000208614A (ja) | 2000-07-28 |
| JP2000208614A5 JP2000208614A5 (enExample) | 2006-04-06 |
Family
ID=11674630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11007759A Pending JP2000208614A (ja) | 1999-01-14 | 1999-01-14 | 半導体装置の製造方法及び半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6436792B1 (enExample) |
| JP (1) | JP2000208614A (enExample) |
Cited By (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8536636B2 (en) | 2007-04-26 | 2013-09-17 | Peregrine Semiconductor Corporation | Tuning capacitance to enhance FET stack voltage withstand |
| US8559907B2 (en) | 2004-06-23 | 2013-10-15 | Peregrine Semiconductor Corporation | Integrated RF front end with stacked transistor switch |
| US8583111B2 (en) | 2001-10-10 | 2013-11-12 | Peregrine Semiconductor Corporation | Switch circuit and method of switching radio frequency signals |
| US8604864B2 (en) | 2008-02-28 | 2013-12-10 | Peregrine Semiconductor Corporation | Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals |
| US8723260B1 (en) | 2009-03-12 | 2014-05-13 | Rf Micro Devices, Inc. | Semiconductor radio frequency switch with body contact |
| US8742502B2 (en) | 2005-07-11 | 2014-06-03 | Peregrine Semiconductor Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction |
| US9130564B2 (en) | 2005-07-11 | 2015-09-08 | Peregrine Semiconductor Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink |
| US9406695B2 (en) | 2013-11-20 | 2016-08-02 | Peregrine Semiconductor Corporation | Circuit and method for improving ESD tolerance and switching speed |
| US9419565B2 (en) | 2013-03-14 | 2016-08-16 | Peregrine Semiconductor Corporation | Hot carrier injection compensation |
| US9608619B2 (en) | 2005-07-11 | 2017-03-28 | Peregrine Semiconductor Corporation | Method and apparatus improving gate oxide reliability by controlling accumulated charge |
| US9831857B2 (en) | 2015-03-11 | 2017-11-28 | Peregrine Semiconductor Corporation | Power splitter with programmable output phase shift |
| JP2017224794A (ja) * | 2016-06-17 | 2017-12-21 | ラピスセミコンダクタ株式会社 | 半導体装置および半導体装置の製造方法 |
| US9948281B2 (en) | 2016-09-02 | 2018-04-17 | Peregrine Semiconductor Corporation | Positive logic digitally tunable capacitor |
| US10236872B1 (en) | 2018-03-28 | 2019-03-19 | Psemi Corporation | AC coupling modules for bias ladders |
| US10505530B2 (en) | 2018-03-28 | 2019-12-10 | Psemi Corporation | Positive logic switch with selectable DC blocking circuit |
| US10790390B2 (en) | 2005-07-11 | 2020-09-29 | Psemi Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction |
| US10804892B2 (en) | 2005-07-11 | 2020-10-13 | Psemi Corporation | Circuit and method for controlling charge injection in radio frequency switches |
| US10886911B2 (en) | 2018-03-28 | 2021-01-05 | Psemi Corporation | Stacked FET switch bias ladders |
| USRE48965E1 (en) | 2005-07-11 | 2022-03-08 | Psemi Corporation | Method and apparatus improving gate oxide reliability by controlling accumulated charge |
| US11476849B2 (en) | 2020-01-06 | 2022-10-18 | Psemi Corporation | High power positive logic switch |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7411245B2 (en) * | 2005-11-30 | 2008-08-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Spacer barrier structure to prevent spacer voids and method for forming the same |
| US9590674B2 (en) | 2012-12-14 | 2017-03-07 | Peregrine Semiconductor Corporation | Semiconductor devices with switchable ground-body connection |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2507567B2 (ja) * | 1988-11-25 | 1996-06-12 | 三菱電機株式会社 | 絶縁体基板上の半導体層に形成されたmos型電界効果トランジスタ |
| JP2547663B2 (ja) * | 1990-10-03 | 1996-10-23 | 三菱電機株式会社 | 半導体装置 |
| US6171931B1 (en) * | 1994-12-15 | 2001-01-09 | Sgs-Thomson Microelectronics S.R.L. | Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication |
| JPH1022462A (ja) * | 1996-06-28 | 1998-01-23 | Sharp Corp | 半導体装置及びその製造方法 |
| KR100218668B1 (ko) * | 1996-12-14 | 1999-09-01 | 권혁준 | 바이폴라 소자의 컬랙터 장치 및 그 제조방법 |
| US5973358A (en) * | 1997-07-01 | 1999-10-26 | Citizen Watch Co., Ltd. | SOI device having a channel with variable thickness |
| KR100253406B1 (ko) * | 1998-01-20 | 2000-04-15 | 김영환 | 반도체 파워 집적회로에서의 소자격리구조 및 그 방법 |
-
1999
- 1999-01-14 JP JP11007759A patent/JP2000208614A/ja active Pending
- 1999-06-04 US US09/325,644 patent/US6436792B1/en not_active Expired - Fee Related
Cited By (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10812068B2 (en) | 2001-10-10 | 2020-10-20 | Psemi Corporation | Switch circuit and method of switching radio frequency signals |
| US8583111B2 (en) | 2001-10-10 | 2013-11-12 | Peregrine Semiconductor Corporation | Switch circuit and method of switching radio frequency signals |
| US10622993B2 (en) | 2001-10-10 | 2020-04-14 | Psemi Corporation | Switch circuit and method of switching radio frequency signals |
| US10790820B2 (en) | 2001-10-10 | 2020-09-29 | Psemi Corporation | Switch circuit and method of switching radio frequency signals |
| US10797694B2 (en) | 2001-10-10 | 2020-10-06 | Psemi Corporation | Switch circuit and method of switching radio frequency signals |
| US8559907B2 (en) | 2004-06-23 | 2013-10-15 | Peregrine Semiconductor Corporation | Integrated RF front end with stacked transistor switch |
| US8649754B2 (en) | 2004-06-23 | 2014-02-11 | Peregrine Semiconductor Corporation | Integrated RF front end with stacked transistor switch |
| US9680416B2 (en) | 2004-06-23 | 2017-06-13 | Peregrine Semiconductor Corporation | Integrated RF front end with stacked transistor switch |
| US9369087B2 (en) | 2004-06-23 | 2016-06-14 | Peregrine Semiconductor Corporation | Integrated RF front end with stacked transistor switch |
| US9130564B2 (en) | 2005-07-11 | 2015-09-08 | Peregrine Semiconductor Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink |
| US10622990B2 (en) | 2005-07-11 | 2020-04-14 | Psemi Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink |
| US10804892B2 (en) | 2005-07-11 | 2020-10-13 | Psemi Corporation | Circuit and method for controlling charge injection in radio frequency switches |
| US9087899B2 (en) | 2005-07-11 | 2015-07-21 | Peregrine Semiconductor Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction |
| US10797691B1 (en) | 2005-07-11 | 2020-10-06 | Psemi Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink |
| US10818796B2 (en) | 2005-07-11 | 2020-10-27 | Psemi Corporation | Method and apparatus improving gate oxide reliability by controlling accumulated charge |
| US10797172B2 (en) | 2005-07-11 | 2020-10-06 | Psemi Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction |
| US8742502B2 (en) | 2005-07-11 | 2014-06-03 | Peregrine Semiconductor Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction |
| US9608619B2 (en) | 2005-07-11 | 2017-03-28 | Peregrine Semiconductor Corporation | Method and apparatus improving gate oxide reliability by controlling accumulated charge |
| USRE48944E1 (en) | 2005-07-11 | 2022-02-22 | Psemi Corporation | Method and apparatus for use in improving linearity of MOSFETS using an accumulated charge sink |
| US10790390B2 (en) | 2005-07-11 | 2020-09-29 | Psemi Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction |
| US10680600B2 (en) | 2005-07-11 | 2020-06-09 | Psemi Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink |
| USRE48965E1 (en) | 2005-07-11 | 2022-03-08 | Psemi Corporation | Method and apparatus improving gate oxide reliability by controlling accumulated charge |
| US9177737B2 (en) | 2007-04-26 | 2015-11-03 | Peregrine Semiconductor Corporation | Tuning capacitance to enhance FET stack voltage withstand |
| US10951210B2 (en) | 2007-04-26 | 2021-03-16 | Psemi Corporation | Tuning capacitance to enhance FET stack voltage withstand |
| US8536636B2 (en) | 2007-04-26 | 2013-09-17 | Peregrine Semiconductor Corporation | Tuning capacitance to enhance FET stack voltage withstand |
| US9197194B2 (en) | 2008-02-28 | 2015-11-24 | Peregrine Semiconductor Corporation | Methods and apparatuses for use in tuning reactance in a circuit device |
| US8604864B2 (en) | 2008-02-28 | 2013-12-10 | Peregrine Semiconductor Corporation | Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals |
| US9024700B2 (en) | 2008-02-28 | 2015-05-05 | Peregrine Semiconductor Corporation | Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device |
| US9106227B2 (en) | 2008-02-28 | 2015-08-11 | Peregrine Semiconductor Corporation | Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals |
| US9293262B2 (en) | 2008-02-28 | 2016-03-22 | Peregrine Semiconductor Corporation | Digitally tuned capacitors with tapered and reconfigurable quality factors |
| US8723260B1 (en) | 2009-03-12 | 2014-05-13 | Rf Micro Devices, Inc. | Semiconductor radio frequency switch with body contact |
| US9419565B2 (en) | 2013-03-14 | 2016-08-16 | Peregrine Semiconductor Corporation | Hot carrier injection compensation |
| US9406695B2 (en) | 2013-11-20 | 2016-08-02 | Peregrine Semiconductor Corporation | Circuit and method for improving ESD tolerance and switching speed |
| US9831857B2 (en) | 2015-03-11 | 2017-11-28 | Peregrine Semiconductor Corporation | Power splitter with programmable output phase shift |
| JP2017224794A (ja) * | 2016-06-17 | 2017-12-21 | ラピスセミコンダクタ株式会社 | 半導体装置および半導体装置の製造方法 |
| US9948281B2 (en) | 2016-09-02 | 2018-04-17 | Peregrine Semiconductor Corporation | Positive logic digitally tunable capacitor |
| US11018662B2 (en) | 2018-03-28 | 2021-05-25 | Psemi Corporation | AC coupling modules for bias ladders |
| US10886911B2 (en) | 2018-03-28 | 2021-01-05 | Psemi Corporation | Stacked FET switch bias ladders |
| US10862473B2 (en) | 2018-03-28 | 2020-12-08 | Psemi Corporation | Positive logic switch with selectable DC blocking circuit |
| US10505530B2 (en) | 2018-03-28 | 2019-12-10 | Psemi Corporation | Positive logic switch with selectable DC blocking circuit |
| US10236872B1 (en) | 2018-03-28 | 2019-03-19 | Psemi Corporation | AC coupling modules for bias ladders |
| US11418183B2 (en) | 2018-03-28 | 2022-08-16 | Psemi Corporation | AC coupling modules for bias ladders |
| US11870431B2 (en) | 2018-03-28 | 2024-01-09 | Psemi Corporation | AC coupling modules for bias ladders |
| US11476849B2 (en) | 2020-01-06 | 2022-10-18 | Psemi Corporation | High power positive logic switch |
| US12081211B2 (en) | 2020-01-06 | 2024-09-03 | Psemi Corporation | High power positive logic switch |
Also Published As
| Publication number | Publication date |
|---|---|
| US6436792B1 (en) | 2002-08-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2000208614A (ja) | 半導体装置の製造方法及び半導体装置 | |
| JP4072335B2 (ja) | 浅いトレンチ分離構造を有する半導体デバイス及びその製造方法 | |
| US8039326B2 (en) | Methods for fabricating bulk FinFET devices having deep trench isolation | |
| US9087870B2 (en) | Integrated circuits including FINFET devices with shallow trench isolation that includes a thermal oxide layer and methods for making the same | |
| CN101536166B (zh) | 形成场效应晶体管的方法、多个场效应晶体管及包括多个存储器单元的动态随机存取存储器电路 | |
| US8263462B2 (en) | Dielectric punch-through stoppers for forming FinFETs having dual fin heights | |
| CN102132397B (zh) | 具有隔离沟槽衬垫的半导体器件及相关制造方法 | |
| JP5319046B2 (ja) | ベリード酸化膜を具備する半導体装置の製造方法及びこれを具備する半導体装置 | |
| US9595578B2 (en) | Undercut insulating regions for silicon-on-insulator device | |
| US20120112309A1 (en) | Low cost fabrication of double box back gate silicon-on-insulator wafers with subsequent self aligned shallow trench isolation | |
| JPWO2006006438A1 (ja) | 半導体装置及びその製造方法 | |
| JP2000208614A5 (enExample) | ||
| TW201501301A (zh) | 具有矽局部氧化之絕緣體上矽的積體電路及其製造方法 | |
| WO2018040866A1 (zh) | Vdmos器件及其制造方法 | |
| US9847347B1 (en) | Semiconductor structure including a first transistor at a semiconductor-on-insulator region and a second transistor at a bulk region and method for the formation thereof | |
| JP2001196576A (ja) | 半導体装置およびその製造方法 | |
| JP4288925B2 (ja) | 半導体装置およびその製造方法 | |
| JP2004363486A (ja) | トレンチ分離を有する半導体装置およびその製造方法 | |
| CN120050972A (zh) | 一种场效应晶体管及其制造方法 | |
| JP2003229494A (ja) | 垂直シリコン−オン−インシュレータ構造の円筒形トランジスタ及びその製造方法 | |
| JP2002076113A (ja) | 半導体装置およびその製造方法 | |
| JP2012142505A (ja) | 半導体装置およびその製造方法 | |
| JP2006164998A (ja) | 半導体装置およびその製造方法 | |
| US20070020862A1 (en) | Semiconductor device and method of fabricating the same | |
| JP2000031489A (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20060111 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060111 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20080616 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080624 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20081021 |