JP2000195887A - 電子部品 - Google Patents

電子部品

Info

Publication number
JP2000195887A
JP2000195887A JP10369705A JP36970598A JP2000195887A JP 2000195887 A JP2000195887 A JP 2000195887A JP 10369705 A JP10369705 A JP 10369705A JP 36970598 A JP36970598 A JP 36970598A JP 2000195887 A JP2000195887 A JP 2000195887A
Authority
JP
Japan
Prior art keywords
opening
insulating film
bonding pad
bump electrode
opening area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10369705A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000195887A5 (enExample
Inventor
Yoshiyasu Jitsuzawa
佳居 実沢
Yoshikazu Yamaoka
義和 山岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP10369705A priority Critical patent/JP2000195887A/ja
Publication of JP2000195887A publication Critical patent/JP2000195887A/ja
Publication of JP2000195887A5 publication Critical patent/JP2000195887A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05567Disposition the external layer being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13016Shape in side view
    • H01L2224/13018Shape in side view comprising protrusions or indentations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13022Disposition the bump connector being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP10369705A 1998-12-25 1998-12-25 電子部品 Pending JP2000195887A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10369705A JP2000195887A (ja) 1998-12-25 1998-12-25 電子部品

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10369705A JP2000195887A (ja) 1998-12-25 1998-12-25 電子部品

Publications (2)

Publication Number Publication Date
JP2000195887A true JP2000195887A (ja) 2000-07-14
JP2000195887A5 JP2000195887A5 (enExample) 2005-12-15

Family

ID=18495117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10369705A Pending JP2000195887A (ja) 1998-12-25 1998-12-25 電子部品

Country Status (1)

Country Link
JP (1) JP2000195887A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100691151B1 (ko) * 2005-02-24 2007-03-09 삼성전기주식회사 솔더범프 앵커시스템
CN106030786A (zh) * 2014-03-28 2016-10-12 英特尔公司 锚固的互连件
JP2016184619A (ja) * 2015-03-25 2016-10-20 大日本印刷株式会社 多層配線構造体
JP2016184620A (ja) * 2015-03-25 2016-10-20 大日本印刷株式会社 多層配線構造体
WO2025206133A1 (ja) * 2024-03-27 2025-10-02 京セラ株式会社 バンプ用電極構造、バンプ構造およびサーマルヘッド

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100691151B1 (ko) * 2005-02-24 2007-03-09 삼성전기주식회사 솔더범프 앵커시스템
CN106030786A (zh) * 2014-03-28 2016-10-12 英特尔公司 锚固的互连件
EP3123505A4 (en) * 2014-03-28 2017-11-22 Intel Corporation Anchored interconnect
CN106030786B (zh) * 2014-03-28 2019-09-10 英特尔公司 锚固的互连件
JP2016184619A (ja) * 2015-03-25 2016-10-20 大日本印刷株式会社 多層配線構造体
JP2016184620A (ja) * 2015-03-25 2016-10-20 大日本印刷株式会社 多層配線構造体
WO2025206133A1 (ja) * 2024-03-27 2025-10-02 京セラ株式会社 バンプ用電極構造、バンプ構造およびサーマルヘッド

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