JP2000194556A - 命令ルックアヘッドシステムおよびハ―ドウェア - Google Patents

命令ルックアヘッドシステムおよびハ―ドウェア

Info

Publication number
JP2000194556A
JP2000194556A JP11365694A JP36569499A JP2000194556A JP 2000194556 A JP2000194556 A JP 2000194556A JP 11365694 A JP11365694 A JP 11365694A JP 36569499 A JP36569499 A JP 36569499A JP 2000194556 A JP2000194556 A JP 2000194556A
Authority
JP
Japan
Prior art keywords
instruction
counter
register
code
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11365694A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000194556A5 (enExample
Inventor
Burton J Smith
ジェイ． スミス バートン
Robert L Alverson
エル． アルバーソン ロバート
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cray Inc
Original Assignee
Tera Computer Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tera Computer Co filed Critical Tera Computer Co
Publication of JP2000194556A publication Critical patent/JP2000194556A/ja
Publication of JP2000194556A5 publication Critical patent/JP2000194556A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
JP11365694A 1998-12-23 1999-12-22 命令ルックアヘッドシステムおよびハ―ドウェア Pending JP2000194556A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/221.187 1998-12-23
US09/221,187 US6311266B1 (en) 1998-12-23 1998-12-23 Instruction look-ahead system and hardware

Publications (2)

Publication Number Publication Date
JP2000194556A true JP2000194556A (ja) 2000-07-14
JP2000194556A5 JP2000194556A5 (enExample) 2007-02-15

Family

ID=22826734

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11365694A Pending JP2000194556A (ja) 1998-12-23 1999-12-22 命令ルックアヘッドシステムおよびハ―ドウェア

Country Status (3)

Country Link
US (1) US6311266B1 (enExample)
EP (1) EP1014261A1 (enExample)
JP (1) JP2000194556A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010522920A (ja) * 2007-03-26 2010-07-08 イマジネイション テクノロジーズ リミテッド パイプラインプロセッサにおける長い待ち時間命令の処理
KR20140113304A (ko) * 2013-03-14 2014-09-24 삼성전자주식회사 디펜던시들을 정리하고 리빌딩하는 시스템 및 방법

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7779234B2 (en) * 2007-10-23 2010-08-17 International Business Machines Corporation System and method for implementing a hardware-supported thread assist under load lookahead mechanism for a microprocessor
US9471317B2 (en) * 2012-09-27 2016-10-18 Texas Instruments Deutschland Gmbh Execution of additional instructions in conjunction atomically as specified in instruction field
US10185568B2 (en) 2016-04-22 2019-01-22 Microsoft Technology Licensing, Llc Annotation logic for dynamic instruction lookahead distance determination

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5555384A (en) 1989-12-01 1996-09-10 Silicon Graphics, Inc. Rescheduling conflicting issued instructions by delaying one conflicting instruction into the same pipeline stage as a third non-conflicting instruction
EP0689694B1 (de) 1993-03-15 1997-01-02 Siemens Aktiengesellschaft Verfahren zur maschinellen erzeugung von nebenläufig bearbeitbaren befehlsgruppen aus einem programm für superskalare mikroprozessoren
US5933627A (en) * 1996-07-01 1999-08-03 Sun Microsystems Thread switch on blocked load or store using instruction thread field
US6233599B1 (en) * 1997-07-10 2001-05-15 International Business Machines Corporation Apparatus and method for retrofitting multi-threaded operations on a computer by partitioning and overlapping registers
US6223208B1 (en) * 1997-10-03 2001-04-24 International Business Machines Corporation Moving data in and out of processor units using idle register/storage functional units
US6105051A (en) * 1997-10-23 2000-08-15 International Business Machines Corporation Apparatus and method to guarantee forward progress in execution of threads in a multithreaded processor
KR100280460B1 (ko) * 1998-04-08 2001-02-01 김영환 데이터 처리 장치 및 이의 복수의 스레드 처리 방법

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010522920A (ja) * 2007-03-26 2010-07-08 イマジネイション テクノロジーズ リミテッド パイプラインプロセッサにおける長い待ち時間命令の処理
KR20140113304A (ko) * 2013-03-14 2014-09-24 삼성전자주식회사 디펜던시들을 정리하고 리빌딩하는 시스템 및 방법
JP2014179101A (ja) * 2013-03-14 2014-09-25 Samsung Electronics Co Ltd ディペンデンシーを整理し、リビルディングするシステム及び方法
KR102010312B1 (ko) 2013-03-14 2019-08-13 삼성전자주식회사 디펜던시들을 정리하고 리빌딩하는 시스템 및 방법
US10552157B2 (en) 2013-03-14 2020-02-04 Samsung Electronics Co., Ltd. System and method to clear and rebuild dependencies

Also Published As

Publication number Publication date
EP1014261A1 (en) 2000-06-28
US6311266B1 (en) 2001-10-30

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