JP2000173266A - 昇圧回路 - Google Patents
昇圧回路Info
- Publication number
- JP2000173266A JP2000173266A JP10347007A JP34700798A JP2000173266A JP 2000173266 A JP2000173266 A JP 2000173266A JP 10347007 A JP10347007 A JP 10347007A JP 34700798 A JP34700798 A JP 34700798A JP 2000173266 A JP2000173266 A JP 2000173266A
- Authority
- JP
- Japan
- Prior art keywords
- channel mos
- mos transistor
- node
- voltage
- boosting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Dram (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10347007A JP2000173266A (ja) | 1998-12-07 | 1998-12-07 | 昇圧回路 |
| US09/324,802 US6154411A (en) | 1998-12-07 | 1999-06-03 | Boosting circuit compensating for voltage fluctuation due to operation of load |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10347007A JP2000173266A (ja) | 1998-12-07 | 1998-12-07 | 昇圧回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000173266A true JP2000173266A (ja) | 2000-06-23 |
| JP2000173266A5 JP2000173266A5 (https=) | 2006-01-19 |
Family
ID=18387296
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10347007A Pending JP2000173266A (ja) | 1998-12-07 | 1998-12-07 | 昇圧回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6154411A (https=) |
| JP (1) | JP2000173266A (https=) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6831500B2 (en) | 2002-10-25 | 2004-12-14 | Elpida Memory, Inc. | Noise-reduced voltage boosting circuit |
| KR100465248B1 (ko) * | 2000-08-14 | 2005-01-13 | 미쓰비시 덴끼 엔지니어링 가부시키가이샤 | 기판 바이어스 전압 발생 회로 |
| US6885225B2 (en) | 2002-02-18 | 2005-04-26 | Renesas Technology Corp. | Drive circuit |
| US7253676B2 (en) | 2003-12-25 | 2007-08-07 | Kabushiki Kaisha Toshiba | Semiconductor device and driving method of semiconductor device |
| JP2010057230A (ja) * | 2008-08-27 | 2010-03-11 | Nec Electronics Corp | 電圧生成回路及びその動作制御方法 |
| JP2010226772A (ja) * | 2009-03-19 | 2010-10-07 | Denso Corp | 電源装置 |
| JP2011071791A (ja) * | 2009-09-28 | 2011-04-07 | Toppan Printing Co Ltd | チャージポンプ回路 |
| US7956675B2 (en) | 2008-09-08 | 2011-06-07 | Rohm Co., Ltd. | Control circuit and control method for charge pump circuit |
| KR101161742B1 (ko) | 2010-07-30 | 2012-07-02 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 동작 방법 |
| JP2013009551A (ja) * | 2011-06-27 | 2013-01-10 | Fujitsu Semiconductor Ltd | 電源装置 |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999062059A1 (en) * | 1998-05-22 | 1999-12-02 | Seagate Technology Llc | Adaptive low-noise current generator and method |
| US6781439B2 (en) * | 1998-07-30 | 2004-08-24 | Kabushiki Kaisha Toshiba | Memory device pump circuit with two booster circuits |
| JP3430050B2 (ja) * | 1998-12-28 | 2003-07-28 | 日本電気株式会社 | 半導体記憶装置およびその駆動方法 |
| US6377502B1 (en) * | 1999-05-10 | 2002-04-23 | Kabushiki Kaisha Toshiba | Semiconductor device that enables simultaneous read and write/erase operation |
| KR100351931B1 (ko) * | 2000-05-30 | 2002-09-12 | 삼성전자 주식회사 | 반도체 메모리 장치의 전압 감지 회로 |
| US6300839B1 (en) * | 2000-08-22 | 2001-10-09 | Xilinx, Inc. | Frequency controlled system for positive voltage regulation |
| JP2002091604A (ja) * | 2000-09-19 | 2002-03-29 | Mitsubishi Electric Corp | クロック発生回路 |
| KR100374644B1 (ko) * | 2001-01-27 | 2003-03-03 | 삼성전자주식회사 | 승압 전압의 조절이 가능한 전압 승압 회로 |
| EP1229548B1 (en) * | 2001-02-06 | 2008-05-21 | STMicroelectronics S.r.l. | Charge pump for a nonvolatile memory with read voltage regulation in the presence of address skew, and nonvolatile memory comprising such a charge pump |
| JP2003022686A (ja) * | 2001-07-09 | 2003-01-24 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| US6486727B1 (en) | 2001-10-11 | 2002-11-26 | Pericom Semiconductor Corp. | Low-power substrate bias generator disabled by comparators for supply over-voltage protection and bias target voltage |
| KR100543318B1 (ko) * | 2002-10-07 | 2006-01-20 | 주식회사 하이닉스반도체 | 부스팅 전압 제어회로 |
| US6992517B2 (en) * | 2003-08-11 | 2006-01-31 | Atmel Corporation | Self-limiting pulse width modulation regulator |
| JP4492935B2 (ja) * | 2004-03-08 | 2010-06-30 | ルネサスエレクトロニクス株式会社 | 昇圧回路および昇圧回路を備えた半導体装置 |
| KR100680441B1 (ko) * | 2005-06-07 | 2007-02-08 | 주식회사 하이닉스반도체 | 안정적인 승압 전압을 발생하는 승압 전압 발생기 |
| US7224207B2 (en) * | 2005-09-20 | 2007-05-29 | Taiwan Semiconductor Manufacturing Co. | Charge pump system with smooth voltage output |
| KR100721899B1 (ko) | 2006-01-11 | 2007-05-28 | 삼성전자주식회사 | 승압 전압 발생회로 및 승압 전압 발생방법 |
| US7443230B2 (en) * | 2006-08-10 | 2008-10-28 | Elite Semiconductor Memory Technology Inc. | Charge pump circuit |
| KR100809071B1 (ko) * | 2006-09-25 | 2008-03-03 | 삼성전자주식회사 | 고전압 발생 회로를 구비하는 반도체 장치 및 그 전압 발생방법 |
| KR100809072B1 (ko) * | 2006-09-28 | 2008-03-03 | 삼성전자주식회사 | 고전압 발생 회로를 구비하는 반도체 장치 및 그 전압 발생방법 |
| KR101034613B1 (ko) * | 2009-06-05 | 2011-05-12 | 주식회사 하이닉스반도체 | 내부전압발생회로 |
| US8013666B1 (en) * | 2009-07-31 | 2011-09-06 | Altera Corporation | Low ripple charge pump |
| JP2011175710A (ja) * | 2010-02-24 | 2011-09-08 | Toshiba Corp | 半導体記憶装置 |
| TWI481163B (zh) * | 2012-02-24 | 2015-04-11 | Novatek Microelectronics Corp | 充電幫浦裝置及其驅動能力調整方法 |
| US9337724B2 (en) * | 2013-11-19 | 2016-05-10 | Globalfoundries Inc. | Load sensing voltage charge pump system |
| US20180315458A1 (en) * | 2017-04-28 | 2018-11-01 | Nanya Technology Corporation | Voltage system and method for operating the same |
| US10250132B2 (en) * | 2017-06-09 | 2019-04-02 | Nanya Technology Corporation | Voltage system and operating method thereof |
| CN110739849A (zh) * | 2019-10-17 | 2020-01-31 | 合肥联宝信息技术有限公司 | 一种供电电路及电子设备 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02121188A (ja) * | 1988-10-28 | 1990-05-09 | Matsushita Electric Ind Co Ltd | 基板バイアス発生回路 |
| JP3107556B2 (ja) * | 1990-06-01 | 2000-11-13 | 株式会社東芝 | ダイナミック型半導体記憶装置 |
| KR960000837B1 (ko) * | 1992-12-02 | 1996-01-13 | 삼성전자주식회사 | 반도체 메모리장치 |
| JP2917914B2 (ja) * | 1996-05-17 | 1999-07-12 | 日本電気株式会社 | 昇圧回路 |
-
1998
- 1998-12-07 JP JP10347007A patent/JP2000173266A/ja active Pending
-
1999
- 1999-06-03 US US09/324,802 patent/US6154411A/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100465248B1 (ko) * | 2000-08-14 | 2005-01-13 | 미쓰비시 덴끼 엔지니어링 가부시키가이샤 | 기판 바이어스 전압 발생 회로 |
| US6885225B2 (en) | 2002-02-18 | 2005-04-26 | Renesas Technology Corp. | Drive circuit |
| US6831500B2 (en) | 2002-10-25 | 2004-12-14 | Elpida Memory, Inc. | Noise-reduced voltage boosting circuit |
| US7253676B2 (en) | 2003-12-25 | 2007-08-07 | Kabushiki Kaisha Toshiba | Semiconductor device and driving method of semiconductor device |
| JP2010057230A (ja) * | 2008-08-27 | 2010-03-11 | Nec Electronics Corp | 電圧生成回路及びその動作制御方法 |
| US7956675B2 (en) | 2008-09-08 | 2011-06-07 | Rohm Co., Ltd. | Control circuit and control method for charge pump circuit |
| JP2010226772A (ja) * | 2009-03-19 | 2010-10-07 | Denso Corp | 電源装置 |
| JP2011071791A (ja) * | 2009-09-28 | 2011-04-07 | Toppan Printing Co Ltd | チャージポンプ回路 |
| KR101161742B1 (ko) | 2010-07-30 | 2012-07-02 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 동작 방법 |
| US8330533B2 (en) | 2010-07-30 | 2012-12-11 | Hynix Semiconductor Inc. | Semiconductor device and operating method thereof |
| JP2013009551A (ja) * | 2011-06-27 | 2013-01-10 | Fujitsu Semiconductor Ltd | 電源装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| US6154411A (en) | 2000-11-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20051130 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20051130 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090119 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090127 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20090602 |