JP2000165052A - Multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inexpensive multilayer wiring board in which the discontinuity and shorting of a wiring circuit do not occur, a warp does not occur, the thickness of the board is reduced, requested miniaturization, thinning and high precision are realized and whose number of manufacture processes is small. SOLUTION: A multilayer wiring layer B having insulating layers 1 containing thermosetting resin whose coefficient difference of thermal expansion with a core wiring board A is not more than 20 ppm/ deg.C, wiring circuit layers 2 where metal foil is buried on the surfaces of the insulating layers 1 and via hole conductors 3 is formed on one face of the core wiring board A. The thickness of the mulilayer wiring board B is set to be not more than 2/3. Thus, the inexpensive multilayer wiring board which is superior in the surface flatness on the surface of the wiring board, in which a warp does not occur in the board, the thickness of the board is thin, which is miniaturized, thinned and is made into high precision is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compact, thin, high-density package for housing semiconductor elements, a hybrid integrated circuit board, etc., which are optimal for the field of bare chip mounting, such as cellular phones and video cameras. The present invention relates to a multilayer wiring board that can be employed.

[0002]

2. Description of the Related Art Conventionally, electronic devices have been reduced in size and weight. However, in recent years, with the development of portable information terminals and the spread of so-called mobile computing that carries and operates computers, the size and thickness of electronic devices have been further reduced. There is a tendency for a multilayer wiring board with higher definition to be required.

In addition, as represented by recent communication equipment,
2. Description of the Related Art Electronic devices that require high-speed operation have been widely used, and there are various demands for such high-speed operation, such as accurate switching of high-frequency signals. There is a demand for a multilayer printed wiring board suitable for high-speed operation in equipment.

[0004] Therefore, in order to perform the high-speed operation as described above, it is necessary to shorten the length of the wiring to reduce the time required for transmitting an electric signal. 2. Description of the Related Art A multilayer wiring board that has been reduced in size, thickness, and definition has been developed, for example, by narrowing the width of wiring and narrowing the gap between wirings.

In order to meet such a demand for high-density wiring, a build-up method has conventionally been employed as a method for manufacturing a multilayer wiring board. In this build-up method, as shown in FIG. 3A, first, a wiring circuit layer 22 is formed on the surface of an insulating substrate 21 made of a glass epoxy composite material, and the front and back of the insulating substrate 21 are electrically connected. A core wiring board a on which the through-hole conductor 23 is formed is prepared.

Next, as shown in FIG. 2B, a photosensitive resin is applied to the surface of the core wiring board a to form an insulating layer 24, and as shown in FIG. The via hole 25 is formed by exposing the insulating layer 24 to light.

Thereafter, as shown in FIG. 1D, a plating layer 26 of copper or the like is formed on the entire surface of the insulating layer 24 including the inner wall of the via hole 25, and a photosensitive resist is applied to the surface of the plating layer 26. The wiring circuit layer 27 is formed through the steps of exposing, developing, etching, and removing the resist as shown in FIG.

Thereafter, the steps (b) to (e) are repeated as necessary, whereby the insulating layer and the wiring circuit layer are sequentially and repeatedly formed into a multilayer structure.

[0009]

However, in recent years,
The problem has been clarified with the spread of the build-up method. That is, in the multilayer wiring board manufactured by the build-up method, the insulating layer and the wiring circuit layer are sequentially and alternately formed and laminated on both sides of the core wiring board as described above, so that a positional shift of the via hole occurs. It is easy to cause disconnection in the wiring circuit, or when processing the wiring circuit layer, resist processing is difficult to form a fine wiring pattern, and because it is alternately inverted and laminated as described above However, there is a problem that the foreign matter is easily caught on the lower surface side, resulting in disconnection or short circuit of the wiring circuit.

Further, an insulating substrate made of a glass epoxy composite material generally used for the core wiring substrate has a coefficient of thermal expansion of about 10 to 30 ppm / ° C., but is used for a build-up method. The thermal expansion coefficient of the photosensitive resin is about 50 to 100 ppm / ° C., and the difference in the thermal expansion coefficient between the two makes it easy for the substrate to warp.

Therefore, since a structure is adopted in which the photosensitive resin is applied to both sides of the core wiring substrate with substantially the same thickness to suppress warpage, it is difficult to reduce the thickness of the substrate itself. There is a problem that it is not possible to satisfy the requirements for miniaturization and thinning of the multilayer wiring board.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to prevent the wiring circuit from being disconnected or short-circuited, to prevent the substrate from being warped, and to reduce the thickness of the substrate. It is an object of the present invention to provide a low-cost multi-layer wiring board with a reduced number of manufacturing steps, which realizes the required miniaturization, thinning, and high definition.

[0013]

Means for Solving the Problems The inventors of the present invention have conducted intensive studies to achieve the above object, and as a result, the insulating layer and the wiring circuit layer and the via hole conductor have been formed only on one surface of the core wiring board. Even if a multilayer wiring layer composed of is formed, by controlling the coefficient of thermal expansion of the core wiring substrate and the multilayer wiring layer and the thickness of each layer within a certain range, no warpage is recognized, and disconnection or short circuit of the wiring circuit is also prevented. The inventor found that no occurrence occurred, leading to the present invention.

That is, the multilayer wiring board of the present invention comprises a core wiring board having a wiring circuit layer formed on a surface of an insulating substrate containing a thermosetting resin and a fibrous filler. An insulating layer containing a thermosetting resin having a difference in thermal expansion coefficient of not more than 20 ppm / ° C. and a thickness of not more than ／ of the thickness of the core wiring board; A multilayer wiring layer comprising a wiring circuit layer formed by embedding a metal foil and a via-hole conductor formed by filling a metal powder into a via-hole formed in the insulating layer. is there.

In particular, the thermosetting resin forming the core wiring substrate has a glass transition temperature (Tg) of 30 ° C. which is a temperature difference from the thermosetting temperature of the thermosetting resin forming the insulating layer of the multilayer wiring layer. Is a high heat-resistant resin,
The thermosetting resin constituting the insulating layer of the multilayer wiring layer has a thermosetting shrinkage of 0.1 to 1%, and the metal powder in the metal foil and the via-hole conductor is copper (Cu).
The main component is more preferable.

[0016]

In the multilayer wiring board of the present invention, the difference in the coefficient of thermal expansion between the core wiring board and the insulating substrate is not more than 20 ppm / ° C. and the thickness of the core wiring board is one side of the core wiring board. It has an insulating layer containing a thermosetting resin having a thickness of 2/3 or less, a wiring circuit layer having a metal foil buried on the surface of the insulating layer, and a via-hole conductor filled with metal powder. Since the multilayer wiring layer is formed, the stress caused by the difference in thermal expansion coefficient between the core wiring board and the multilayer wiring layer is effectively suppressed, the warpage of the entire multilayer wiring board is reduced, and one surface of the core wiring board is reduced. By laminating the insulating layer and the wiring circuit layer only on the substrate, the penetration of foreign matter is greatly reduced, the positional accuracy of the via hole is improved, and the occurrence of disconnection or short circuit of the wiring circuit can be suppressed.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer wiring board according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view showing an example of the multilayer wiring board of the present invention. According to FIG. 1, the multilayer wiring board of the present invention comprises an insulating layer 1, a wiring circuit layer 2, and a via-hole conductor 3 on one surface of a core wiring board A containing a thermosetting resin and a fibrous filler. The multilayer wiring layer B is formed.

In FIG. 1, a core wiring board A is an insulating board 4 containing a thermosetting resin 4a and a fibrous filler 4b.
The wiring circuit layer 5 is formed on the surface of the substrate.

The insulating layer 1 constituting the multilayer wiring layer B formed on one surface of the core wiring board A contains an organic resin having a difference in thermal expansion coefficient from the core wiring board A of 20 ppm / ° C. or less. It is important that they be composed of an insulating material. This is because when the difference in the coefficient of thermal expansion is larger than 20 ppm / ° C., the multilayer wiring board B is separated from the core wiring board A due to the stress caused by the difference in thermal expansion between the core wiring board A and the multilayer wiring board B. This is because deformation such as warpage of the entire multilayer wiring board occurs.

Further, the wiring circuit layer 2 made of a metal foil is buried in the surface of the insulating layer 1, and more specifically, the surface of the wiring circuit layer 2 and the surface of the insulating layer 1 are coplanar. The via hole conductor 3 is formed by filling the via hole with metal powder in the insulating layer 1.

It is important that the thickness of the multilayer wiring layer B is 2/3 or less, especially 1/2 or less of the thickness of the core wiring board A. This is because the multilayer wiring layer B is formed only on one side of the core wiring board A, and the multilayer wiring board B and the core wiring board A have different thermal expansions and a different shrinkage rate of the thermosetting resin. This is to prevent the core wiring board A from being deformed due to the formation of the wiring board B on one side. If the thickness of the multilayer wiring layer B is more than 2/3, deformation such as warpage occurs in the entire multilayer wiring board. It is because it becomes big.

In the multilayer wiring board of the present invention, the inorganic filler in the core wiring board A is an indispensable component for increasing the strength of the entire board. In particular, the inorganic filler may be made of a woven or nonwoven fabric. Desirably, glass woven fabric or nonwoven fabric is most desirable, and these inorganic fillers are desirably contained in the insulating substrate at a ratio of 30 to 70% by volume.

Next, the multilayer wiring board of the present invention will be described in detail with reference to the process chart of FIG. First, like a known glass epoxy composite material,
Copper (C) is applied to the surface of the insulating substrate 4 containing the thermosetting resin 4a and the fibrous filler 4b such as a glass woven fabric or a nonwoven fabric.
u), a core wiring substrate A on which a wiring circuit layer 5 made of a metal foil such as aluminum (Al) or silver (Ag) is formed. The wiring circuit layer 5 is particularly suitable for forming a wiring circuit, from the viewpoints of low resistance and processability of conductive resistance, easy obtaining of high peel strength, solderability on the surface layer, surface treatment such as plating, and the like. It is desirable to be formed of a metal foil made of more desirable copper (Cu).

In such a core wiring board A, a photosensitive resist is applied to a metal-foil-laminated substrate having a metal foil stuck on the surface of the insulating substrate 4 and exposed, developed and developed.
By performing the etching process and removing the resist, a desired wiring circuit layer 5 can be formed.

Before forming the wiring circuit layer 5 on the core wiring board A, a through hole is formed at an arbitrary position by a micro drill, a laser beam, or the like.
A metal plating layer such as copper (Cu) is formed on the inner wall of the through-hole to form a through-hole conductor 6, and the core wiring board A
It is also possible to form a wiring circuit layer 5 on both sides of the substrate and electrically connect them with through-hole conductors 6. Note that the voids of the through-hole conductors 6 are filled with a resin 7 or the like.

Further, the thermosetting resin used for the core wiring substrate A has a glass transition temperature (Tg) of 30 degrees from the thermosetting temperature of the insulating layer constituting the multilayer wiring layer described later. If the temperature exceeds ℃, deterioration of the core wiring substrate itself due to thermal decomposition of the thermosetting resin of the core wiring substrate during lamination hardening or blistering of the insulating layer resin due to decomposition gas occurs, so that the temperature difference is more preferably 30 ° C or less. From the viewpoint of dimensional stability of the substrate due to thermal shrinkage and suppression of deterioration in mechanical strength due to repeated expansion and contraction of the core wiring substrate itself and the insulating layer resin due to thermal load when laminating a plurality of insulating layers. , 20 ° C or less is most preferred.

Next, a multilayer wiring layer B is formed on one surface of the core wiring board A. First, as shown in FIG.
First, an uncured or semi-cured soft insulating sheet 8
Is prepared. If the insulating sheet 8 contains a fibrous filler such as a woven or non-woven fabric, the via hole diameter tends to vary due to the non-uniformity of the fibrous filler itself,
In particular, when a glass woven fabric or the like is included, when stored for a long time in high humidity, adverse effects such as migration of the water due to diffusion of water at the interface between the glass fiber and the organic resin occur.

Therefore, the insulating sheet 8 does not include a fibrous filler such as that contained in the core wiring board A, and is formed of a thermosetting resin or a composite material of the thermosetting resin and a powdery inorganic filler powder. It is desirable to be done.

The thickness of the insulating sheet 8 is 1
When the thickness is less than 0 μm, diffusion of moisture in the outside air into the inside by the insulating layer may not be sufficiently suppressed,
On the other hand, if the thickness exceeds 300 μm, the overall thickness of the multilayer wiring layer becomes large, which is unsuitable for thinning and reduction in size and weight.
３００300 μm is desirable, and most preferably 40-100 μm.

When the difference between the thermal expansion coefficients of the insulating sheet 8 and the core wiring board A in the horizontal direction is 20 ppm / ° C. or more, the influence of the warpage due to the stress generated from the difference in thermal expansion increases, and the insulating sheet 8 becomes flat. Is difficult to obtain, and the multilayer wiring layer B cannot be formed only on one surface of the core wiring substrate A. Therefore, the difference in the coefficient of thermal expansion is 20 ppm.
/ ° C or lower, and especially 1 considering the effect of warpage.
0 ppm / ° C or less is optimal.

In the present invention, the thermosetting resin contained in the insulating substrate 4 and the insulating sheet 8 in the core wiring board A is PPE (polyphenylene ether).
Resins such as resin and BT resin (bismaleimide triazine), epoxy resin, polyimide resin, fluorine resin, phenol resin and polyamide bismaleimide are desirable.

The thermal expansion characteristics of the insulating sheet 8 can be controlled by adding an inorganic filler to the thermosetting resin. The inorganic filler applicable at this time is silica (SiO 2). ₂ ) and alumina (A
l ₂ O ₃ ), aluminum nitride (AlN) and the like are suitable, and the filler is preferably in the form of a powder having an average particle diameter of 20 μm or less, particularly 10 μm or less, and more preferably 7 μm or less. The inorganic filler has a volume ratio of the organic resin and the inorganic filler of 15:85 to 5: 5.
95 are mixed.

On the other hand, the insulating sheet 8 is prepared by sufficiently mixing the thermosetting organic resin or the composition of the thermosetting organic resin and the inorganic filler by a known means such as a kneader or a three-roll mill. It can be manufactured by forming into a sheet by a rolling method, an extrusion method, an injection method, a doctor blade method, or the like. After that, the thermosetting resin is semi-cured by heat treatment if necessary.
What is necessary is just to heat to a temperature slightly lower than the temperature sufficient for the thermosetting resin to be completely cured.

The thermosetting shrinkage rate of the insulating sheet constituting the multilayer wiring layer is determined from the viewpoint of the variation in the positional accuracy of the wiring pattern caused by the thermosetting shrinkage or the warping of the wiring board due to the internal stress caused by the heat shrinkage of the resin. , 0.05 to 2% is desirable, and 0.1 to 1% is most effective.

Next, as shown in FIG. 2, a via hole 9 is formed in the insulating sheet 8, and a conductive paste containing a metal powder is filled in the via hole 9 to form a via hole 9 as shown in FIG. A via hole conductor 10 is formed.

Such via holes may be formed by punching or laser processing, but from the viewpoint of accuracy, laser processing of carbon dioxide gas or the like is preferable. However, when a via hole having a diameter exceeding 300 μm is formed by laser processing, the resin in the insulating sheet 8 around the via hole may be burned by the heat of the laser, and residues may adhere around the via hole. When drilling is required, it is desirable to use a drill.

In the case where the via hole is formed by a laser, if the energy of the laser has a large variation, the hole diameter difference between the incident side and the emitting side of the laser beam becomes large. For example, the variation is smaller than ± 1 mJ. When it becomes larger, the difference between the hole diameter on the entrance side and the exit side, that is,
Since the hole diameter difference expressed by (emission side hole diameter / incident side hole diameter) × 100 (%) is smaller than the allowable range of 70%, the variation in laser energy is within ± 1 mJ. It is desirable that

Further, if the pulse interval of the laser beam applied to the same via hole is less than 2 × 10 ^-5 seconds, the resin of the insulating layer tends to burn and residue remains around the via hole. it is desirably × 10 ^-5 seconds or more, the productivity of such pulse interval is what allows enough good via hole to be longer decreases, it is more desirable to set below 2 × 10 ^-3 seconds .

On the other hand, the conductor paste to be filled in the via hole mainly contains a metal powder having an average particle size of 0.5 to 50 μm, such as copper powder, silver powder, silver-coated copper powder, and copper-silver alloy powder. No. That is, when the average particle size of the metal powder is smaller than 0.5 μm, the contact resistance between the metal powders increases and the resistance of the via-hole conductor tends to increase,
On the other hand, if it exceeds 50 μm, it tends to be difficult to reduce the resistance of the via-hole conductor.

In the conductive paste, the melting point is 100 to 400 with respect to 100 parts by weight of the main metal powder.
5 to 100 parts by weight of a metal having a low melting point. These low-melting metals are partially or entirely melted when the resin of the insulating layer is cured, and are mixed between main metal powders or a conductor circuit layer and a via hole to be described later. It has a function of firmly bonding with a conductor. Examples of such a low melting point metal include tin (Sn), zinc (Zn), bismuth (Bi), and silver (Ag) and copper (Cu). Is preferably used.

Then, the insulating sheet 8 on which the via-hole conductor 10 manufactured as described above is formed is laminated and pressed on one surface of the core wiring board A as shown in FIG. Form a layer.

Next, the wiring circuit layer 1 is formed on the surface of the insulating layer 8.
Form one. In the present invention, it is desirable to adopt a transfer method when forming the wiring circuit layer 11. According to this transfer method, after a photosensitive resist is applied to the metal foil adhered to one surface of the transfer film 12, exposure and development are performed,
After performing the etching process, the wiring circuit layer 11 having a predetermined pattern is formed by removing the resist,
Next, a transfer film 12 on which the wiring circuit layer 11 is formed is laminated on the surface of the insulating layer 8 on the side of the wiring circuit layer 11 as shown in FIG. Then, the wiring circuit layer 11 of the transfer film 12 is pressure-bonded to the insulating layer 8 while applying pressure to the surface of the insulating layer 8 in a soft state. Can be buried such that the exposed surface side is flush with the same plane. Thereafter, the wiring circuit layer 11 can be transferred from the transfer film 12 to the insulating layer 8 by peeling off only the transfer film 12 as shown in FIG.

The pressure at which the wiring circuit layer 11 of the transfer film 12 is pressed against the insulating layer 8 is preferably 3 kg / cm ² or more, and the temperature is suitably 60 ° C. or more.

By the above steps, a single-layer wiring layer can be formed.
(B) and (c) of FIG.
After the steps of transferring and embedding the wiring circuit layer shown in (1) are repeated, heat treatment is performed at a temperature sufficient to completely cure the thermosetting resin contained in the insulating sheet, as shown in FIG. A multi-layer wiring layer B can be formed.

The multilayer wiring board of the present invention thus manufactured has a multilayer wiring layer B formed on one surface of a core wiring board A, as shown in FIG. The multilayer wiring layer B on one surface of the core wiring board A is composed of the wiring circuit layer 5 and the through-hole conductor 3 on the surface of the core wiring board A.
And a wiring circuit layer 5 formed on the opposite surface of the core wiring board A by a through-hole conductor 6 formed on the core wiring board B in some cases.
A multilayer wiring board having a wiring circuit layer having a multilayer structure electrically connected to the wiring board can be obtained.

According to the multilayer wiring board of the present invention, FIG.
As is clear from FIG. 2 and FIG. 2, the wiring circuit layers 2 and 11 in the multilayer wiring layer B are both buried in the surfaces of the insulating layers 1 and 8, so that the insulating layers on both sides of the wiring circuit layers 2 and 11 are insulated. A wiring circuit layer 2 having excellent layer adhesion and made of metal foil;
Since the thickness of 11 does not affect the laminated structure, a wiring board having excellent surface smoothness can be obtained.

In particular, wiring circuit layers 2 and 11 made of metal foil
As shown in the enlarged cross-sectional view of FIG. 3, the surface roughness (Ra) of both surfaces is 0.2 μm or more, and the cross-sectional shape is trapezoidal. It is desirable for enhancing transferability and adhesion to the insulating layer. At this time, the trapezoidal formation angle θ is desirably 30 to 80 °. Such a trapezoidal shape can be easily formed by, for example, using ferric chloride, cupric chloride, or the like and setting the etching rate of the metal foil to 2 to 50 μm / min.

Furthermore, if the wiring circuit layers 2 and 11 are formed by the transfer method, the insulating layers 1 and 8 are not immersed in the plating solution or the etching solution. Can be resolved.

The via hole conductors 3 in the multilayer wiring layer B
In No. 10, since the via-hole conductor can be easily formed at an arbitrary position because the conductive paste containing the metal powder is filled, it is possible to increase the definition of the wiring circuit.

Further, the manufacturing process is greatly simplified, and the formation of the wiring circuit layer, the formation of the insulating layer and the formation of the via-hole conductor can be simultaneously advanced.
As a result of significantly reducing the time and cost required for manufacturing, a low-cost multilayer wiring board can be provided.

[0051]

Example 1 The multilayer wiring board of the present invention was evaluated as follows. First, as a core wiring board, a copper-clad board in which a copper foil is formed all over the surface of an insulating board made of a glass woven cloth-epoxy resin composite material having a thickness of 0.6 mm is prepared. After applying a photosensitive resist, exposing and developing, an etching process was performed, and then the resist was removed to form a wiring circuit.

Next, a through hole having a diameter of 0.3 mm was formed on the substrate by a microdrill, and a copper plating layer was formed on the inner wall of the through hole to form a through hole conductor. The voids were filled with epoxy resin to produce a core wiring board. The thermal expansion coefficient of the core wiring board at a temperature from room temperature to 200 ° C. is 16 to 2
It was 0 ppm / ° C. The glass transition temperature (Tg) of the thermosetting resin in the core wiring board was 165 to 200 ° C.

On the other hand, a composition having a volume ratio of spherical silica of 50:50 with respect to polyphenylene ether resin (thermosetting temperature: 200 ° C., thermosetting shrinkage: 0.3%) was used. A semi-cured insulating sheet having a thickness of 120 μm was prepared. The thermal expansion coefficient of this insulating sheet at room temperature to 200 ° C. after curing is 16 to
50 ppm / ° C., and the maximum difference in thermal expansion from the core wiring board was 34 ppm / ° C.

Next, a via hole having a diameter of 100 μm was formed in the produced insulating sheet by a carbon dioxide laser. The laser irradiation condition was 5 millijoules per pulse, and 3 pulses per via formation.
Pulses were applied and the energy variation was set to 0.9 millijoules or less per pulse.

Next, triallyl isocyanurate was added to a mixture of silver-coated copper powder having an average particle size of 5 μm and solder powder having an average particle size of 5 μm at a ratio of 50% by weight to prepare a conductor paste. The via paste was filled in the via hole by a screen printing method using the obtained conductor paste to form a via hole conductor.

Thereafter, an insulating sheet having the via hole conductor formed thereon was laminated and pressed against the core wiring substrate to form an insulating layer.

On the other hand, polyethylene terephthalate (PE)
After adhering a plating surface side of a 12 μm copper foil having a plating surface with one surface being a mirror surface and the other having a surface roughness (Ra) of 0.5 μm on the surface of the transfer film composed of T),
Further, the mirror surface was subjected to an etching treatment with formic acid to perform a surface roughening treatment to a surface roughness (Ra) of 0.5 μm.

Thereafter, a photosensitive resist was applied to the surface of the copper foil, exposed and developed, and then immersed in a ferric chloride solution to reduce the non-patterned portion to 35 μm / cm.
The wiring circuit layer was formed by etching at a minimum etching rate. As a result of observing the cross section of the formed wiring circuit layer, the wiring circuit layer had a trapezoidal cross section having a formation angle θ of 60 °.

Thereafter, the transfer circuit layer side of the transfer film is laminated on the surface of the insulating layer on which the via-hole conductor laminated on the core wiring substrate is formed, and the pressure is set to 12 kg / cm ^{2 at} a pressure of 20 kg / cm ^2.
After holding at 0 ° C. for 1 minute, the transfer film was peeled off.

As a result, the obtained wiring circuit layer is buried on the surface of the soft insulating layer, and the surface of the insulating layer on which the wiring circuit layer is formed is flush with the surface. there were.

Next, the above steps are repeated on the surface of the insulating layer on which the wiring circuit layer is formed, and on one surface of the core wiring substrate, a multilayer wiring comprising two insulating layers and two wiring circuit layers is formed. A layer was formed.

The multilayer wiring layer thus formed on the core wiring substrate is subjected to a heat treatment at a temperature of 200 ° C. for 1 hour, whereby the thermosetting resin in the insulating layer is completely cured, and the entire substrate is cured. As a result, a multilayer wiring board having a total of three wiring circuit layers was manufactured.

For the multilayer wiring board thus obtained,
When the electrical continuity between the multilayer wiring layers formed on one surface side of the core wiring board was measured, a satisfactory conductive state without any problem was obtained.

Further, at a heating temperature of 130 ° C. and a humidity of 8
As a result of evaluating a HAST test maintained for 5 hours in an atmosphere of 5% and a PCT test under a heating temperature condition of 121 ° C. and an atmosphere of 100% humidity and a pressure of 2.1 atm, a rate of change in resistance was 10%. % Or less, the resistance value of the insulating layer is 1
It was as good as 0 ¹¹ Ω or more.

Further, as a result of measuring the flatness (undulation) of the surface of the manufactured multilayer wiring board with a stylus type surface roughness meter,
It was 20 μm or less, and it was confirmed that the semiconductor package exhibited flatness that enables flip-chip mounting as a semiconductor package.

After repeating a temperature cycle test for holding the multilayer wiring board for 30 minutes at a temperature of -65 ° C. and for 30 minutes at a temperature of 125 ° C. for 500 times, the core wiring board and the multilayer wiring were repeated. As a result of observing the cross section of the layer and observing the connection state between the core wiring board and the multilayer wiring layer,
It was confirmed that a good connection state was maintained even after the test.

Comparative Example On the other hand, a multilayer wiring board having a similar total number of the core wiring board was manufactured by the conventional build-up method as shown in FIG. did.

First, a photosensitive resin made of an epoxy resin was applied to a thickness of 100 μm on the surface of the core wiring board to form an insulating layer.

The diameter of the insulating layer was reduced to 1 due to an exposure phenomenon.
After forming a 20 μm via hole, a 12 μm copper plating layer is formed on the entire surface of the insulating layer including the inner wall of the via hole.
, A photosensitive resist was applied to the surface of the plating layer, and after an exposure phenomenon, an etching process was performed and the resist was removed to form a wiring circuit layer.

Thereafter, the above process is repeated on the surface of the insulating layer on which the wiring circuit layer is formed, so that the insulating layer is composed of two layers and the wiring circuit layer is composed of two layers on each of the front and back surfaces of the core wiring substrate. A multilayer wiring layer was formed.

Next, the core wiring board on which the multilayer wiring layer is formed is heated at 160 ° C. for 1 hour to completely cure the thermosetting resin in the insulating layer. A multilayer wiring board composed of six layers was manufactured.

With respect to the multilayer wiring board thus obtained,
When the electrical continuity between the multilayer wiring layers on the upper surface side and the lower surface side of the core wiring board was measured, no abnormality was recognized for all wirings, but the above-described HAST test and PC
In T test, partial disconnection and insulation deterioration (10 ⁸ Ω or less)
Was confirmed.

Further, the flatness (undulation) of the surface of the manufactured multilayer wiring board was measured by a stylus type surface roughness meter.
It was as large as 70 μm and could not be flip-chip mounted.

Further, this substrate was heated at -65 ° C. for 3 hours.
A cross section of the core wiring board and the multilayer wiring layer was observed after repeating a temperature cycle test of holding the temperature for 0 minute and at a temperature of 125 ° C. for 30 minutes each for 500 times, and connecting the core wiring board and the multilayer wiring layer. As a result of observing the state, it was confirmed that cracks occurred between the core wiring board and the multilayer wiring layer.

Example 2 In Example 1, the glass transition temperature (Tg), the coefficient of thermal expansion, and the multi-layer wiring were changed in place of the thermosetting resin constituting the core wiring board and the thermosetting resin in the multi-layer wiring layer. A multilayer wiring board was manufactured by changing the thermal expansion coefficient and thermosetting temperature of the layers and the thickness of the multilayer wiring layer.

The obtained multilayer wiring board was subjected to -65 ° C.
Temperature for 30 minutes and 125 ° C for 30 minutes.
For 500 minutes, the temperature cycle test was held 500 times, and the cross section of the core wiring board and the multilayer wiring layer was observed, and the presence or absence of peeling of the multilayer wiring layer and the amount of warpage of the entire multilayer wiring board were measured. 1 is shown.

[0077]

[Table 1]

As is clear from the results in Table 1, the sample No. 5 in which the thickness of the multilayer wiring layer is more than 2/3 thicker than the thickness of the core wiring substrate, and the insulating layer between the core wiring substrate and the multilayer wiring layer. Sample No. whose thermal expansion coefficient difference exceeds 20 ppm / ° C.
In No. 9, the amount of warpage was large, and partial peeling of the multilayer wiring layer was observed.

On the other hand, the products of the present invention in which the thickness of the multilayer wiring layer and the difference in thermal expansion coefficient were controlled in the predetermined ranges exhibited excellent adhesion and good state without deformation even after the thermal cycle test. Could be maintained.

[0080]

As described above in detail, according to the multilayer wiring board of the present invention, an insulating layer containing a thermosetting resin on one side of a core wiring board, and a metal foil having one surface coinciding with the surface of the insulating layer By providing a multilayer wiring layer composed of a wiring circuit layer buried with, and a via hole conductor and controlling the difference in thermal expansion and the thickness thereof, the surface flatness of the wiring board surface is excellent,
In addition, it is possible to provide a low-cost multi-layer wiring board which has no warp in the board, has a small thickness, is small and thin, and has high definition. In addition, since the manufacturing process is simple and the formation of the wiring circuit layer, the formation of the insulating layer, and the formation of the via-hole conductor can be simultaneously advanced, the time and cost required for the manufacture can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing an example of a multilayer wiring board of the present invention.

FIG. 2 is a manufacturing process diagram for explaining the multilayer wiring board of the present invention.

FIG. 3 is an enlarged sectional view of a wiring circuit layer of the multilayer wiring layer in the multilayer wiring board of the present invention.

FIG. 4 is a process chart for explaining a conventional multilayer wiring board and a method for manufacturing the same.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating layer 2, Wiring circuit layer 3, 10 Via-hole conductor 4 Insulating substrate 5, 11 Wiring circuit layer 6 Through-hole conductor 7 Resin 8 Insulating layer 12 Transfer film A Core wiring board B Multi-layer wiring layer

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Masaaki Hori 1-1-1 Yamashita-cho, Kokubu-shi, Kagoshima F-term in the Kokubu Plant of Kyocera Corporation (reference) 5E346 AA43 CC04 CC08 CC09 CC32 DD22 DD44 FF04 FF07 FF13 FF23 HH22 HH24 HH26

Claims (3)

[Claims] An insulating substrate containing a thermosetting resin and a fibrous filler is provided with a wiring circuit layer formed on one surface of a core wiring substrate. An insulating layer containing a thermosetting resin of 20 ppm / ° C. or less, a wiring circuit layer made of a metal foil embedded on a surface of the insulating layer, and a metal powder filled in a via hole formed in the insulating layer. And a via hole conductor having a thickness of not more than 2/3 of the thickness of the core wiring substrate. 2. The temperature difference between the glass transition temperature (Tg) of the thermosetting resin forming the core wiring substrate and the thermosetting temperature of the thermosetting resin contained in the insulating layer in the multilayer wiring layer. The temperature is 30 ° C. or lower.
The multilayer wiring board as described in the above. 3. The multilayer wiring board according to claim 1, wherein the metal powder in the metal foil and the via-hole conductor contains copper (Cu) as a main component.