JP2000163964A5 - - Google Patents
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- Publication number
- JP2000163964A5 JP2000163964A5 JP1998337677A JP33767798A JP2000163964A5 JP 2000163964 A5 JP2000163964 A5 JP 2000163964A5 JP 1998337677 A JP1998337677 A JP 1998337677A JP 33767798 A JP33767798 A JP 33767798A JP 2000163964 A5 JP2000163964 A5 JP 2000163964A5
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- wiring
- power supply
- negative
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 description 38
- 230000004044 response Effects 0.000 description 15
- 239000004065 semiconductor Substances 0.000 description 12
- 230000003321 amplification Effects 0.000 description 10
- 238000003199 nucleic acid amplification method Methods 0.000 description 10
- 238000009499 grossing Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 7
- 230000007423 decrease Effects 0.000 description 4
- 230000014759 maintenance of location Effects 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000009849 deactivation Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33767798A JP4397062B2 (ja) | 1998-11-27 | 1998-11-27 | 電圧発生回路および半導体記憶装置 |
| US09/321,884 US6246280B1 (en) | 1998-11-27 | 1999-05-28 | Negative voltage generating circuit with high control responsiveness which can be formed using transistor with low breakdown voltage and semiconductor memory device including the same |
| US09/843,691 US6385117B2 (en) | 1998-11-27 | 2001-04-30 | Negative voltage generating circuit with high control responsiveness which can be formed using transistor with low breakdown voltage and semiconductor memory device including the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33767798A JP4397062B2 (ja) | 1998-11-27 | 1998-11-27 | 電圧発生回路および半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000163964A JP2000163964A (ja) | 2000-06-16 |
| JP2000163964A5 true JP2000163964A5 (https=) | 2006-01-12 |
| JP4397062B2 JP4397062B2 (ja) | 2010-01-13 |
Family
ID=18310927
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33767798A Expired - Fee Related JP4397062B2 (ja) | 1998-11-27 | 1998-11-27 | 電圧発生回路および半導体記憶装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US6246280B1 (https=) |
| JP (1) | JP4397062B2 (https=) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4576736B2 (ja) * | 2001-03-28 | 2010-11-10 | セイコーエプソン株式会社 | 電源回路、表示装置および電子機器 |
| US7336121B2 (en) * | 2001-05-04 | 2008-02-26 | Samsung Electronics Co., Ltd. | Negative voltage generator for a semiconductor memory device |
| US6891426B2 (en) * | 2001-10-19 | 2005-05-10 | Intel Corporation | Circuit for providing multiple voltage signals |
| JP3874247B2 (ja) * | 2001-12-25 | 2007-01-31 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| US6784722B2 (en) * | 2002-10-09 | 2004-08-31 | Intel Corporation | Wide-range local bias generator for body bias grid |
| CN1307720C (zh) * | 2003-06-27 | 2007-03-28 | 富士通株式会社 | 半导体集成电路 |
| KR100572323B1 (ko) * | 2003-12-11 | 2006-04-19 | 삼성전자주식회사 | 멀티레벨 고전압 발생장치 |
| US7026843B1 (en) * | 2004-01-16 | 2006-04-11 | Spansion Llc | Flexible cascode amplifier circuit with high gain for flash memory cells |
| JP4965069B2 (ja) * | 2004-10-21 | 2012-07-04 | ラピスセミコンダクタ株式会社 | 半導体集積回路 |
| US8390146B2 (en) * | 2008-02-27 | 2013-03-05 | Panasonic Corporation | Semiconductor integrated circuit and various devices provided with the same |
| KR100956776B1 (ko) | 2008-04-18 | 2010-05-12 | 주식회사 하이닉스반도체 | 네거티브 전압 생성 장치 |
| US7733126B1 (en) * | 2009-03-31 | 2010-06-08 | Freescale Semiconductor, Inc. | Negative voltage generation |
| KR101131945B1 (ko) * | 2010-07-07 | 2012-03-29 | 주식회사 하이닉스반도체 | 비휘발성 메모리 장치 |
| KR101809105B1 (ko) * | 2010-08-06 | 2017-12-14 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 집적 회로 |
| JP5866964B2 (ja) * | 2011-10-25 | 2016-02-24 | 富士通株式会社 | 制御回路及びそれを用いた電子機器 |
| US8830776B1 (en) * | 2013-03-15 | 2014-09-09 | Freescale Semiconductor, Inc. | Negative charge pump regulation |
| JP2015170379A (ja) * | 2014-03-10 | 2015-09-28 | マイクロン テクノロジー, インク. | 半導体装置 |
| US10826388B2 (en) | 2018-12-11 | 2020-11-03 | Texas Instruments Incorporated | Charge pump circuits |
| US12205663B2 (en) * | 2019-07-09 | 2025-01-21 | Arm Limited | Regulated negative charge pump circuitry and methods |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3569310B2 (ja) * | 1993-10-14 | 2004-09-22 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US5614815A (en) * | 1994-03-10 | 1997-03-25 | Fujitsu Limited | Constant voltage supplying circuit |
| KR0145758B1 (ko) * | 1994-08-24 | 1998-08-01 | 김주용 | 반도체 소자의 전압 조정 회로 |
| FR2735921B1 (fr) * | 1995-06-21 | 1997-08-22 | Sgs Thomson Microelectronics | Circuit generateur de phases pour circuit d'alimentation negative du type pompe de charge |
| FR2735922B1 (fr) * | 1995-06-21 | 1997-08-22 | Sgs Thomson Microelectronics | Circuit generateur de tension negative du type pompe de charge |
| JPH10261946A (ja) * | 1997-03-19 | 1998-09-29 | Mitsubishi Electric Corp | 半導体集積回路 |
| KR100293455B1 (ko) * | 1998-08-31 | 2001-07-12 | 김영환 | 반도체메모리소자의전압공급장치 |
-
1998
- 1998-11-27 JP JP33767798A patent/JP4397062B2/ja not_active Expired - Fee Related
-
1999
- 1999-05-28 US US09/321,884 patent/US6246280B1/en not_active Expired - Lifetime
-
2001
- 2001-04-30 US US09/843,691 patent/US6385117B2/en not_active Expired - Fee Related
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