JP2000068316A - 集積回路装置 - Google Patents
集積回路装置Info
- Publication number
- JP2000068316A JP2000068316A JP23601898A JP23601898A JP2000068316A JP 2000068316 A JP2000068316 A JP 2000068316A JP 23601898 A JP23601898 A JP 23601898A JP 23601898 A JP23601898 A JP 23601898A JP 2000068316 A JP2000068316 A JP 2000068316A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- bonding
- integrated circuit
- circuit device
- bonding method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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Abstract
ージが小型であり、チップのボンディング加工時にダメ
ージを与えるおそれの無い集積回路装置を提供する。 【解決手段】 複数の半導体ベアチップ3,4の接続用
電極相互間および該接続用電極と前記半導体ベアチップ
以外の他の外部端子2とをボンディングワイヤで接続し
てなる集積回路装置において、前記半導体ベアチップの
接続用電極3b,4b相互間のボンディングワイヤ6は
ウェッジボンド法で接続し、前記接続用電極3ap4a
と外部端子2との間のボンディングワイヤ5はボールボ
ンド法で接続する。
Description
し、特に複数の集積回路のベアチップを同一基板上に配
設したマルチチップのモジュール化に好適な集積回路装
置に関する。
展しつつある。このマルチチップのモジュール化につい
て、本発明の実施の形態を示す図である図1,図2を借
用して説明する。
より上面に複数の外部端子(ランド)2が形成されたプ
リント基板1上に、ベアチップ3,4を配設する。外部
端子2はスルーホールにより下面に形成したバンプ(突
出電極)10に接続する。ベアチップ3,4の接続用電
極3a,4aと外部端子2との間(接続用電極と外部端
子の間)は、それぞれボンディングワイヤ5で接続し、
ベアチップ3の接続用電極3bおよびベアチップ4の接
続用電極4bとの間(接続用電極相互間)は、別のボン
ディングワイヤ6で接続する。
手段として、超音波ボンディング法の一つであるウェッ
ジボンド法と、熱圧着法の一つであるボールボンド法
(ネイルヘッド法)とが知られている。
ンド法とボールボンド法を説明する。なお、「電子情報
通信ハンドブック・第1版、電子情報通信学会、昭和6
3年3月」を参考にした。
ロセスを説明する。 Al(アルミニウム)線101をボンディング用ウ
ェッジ102の先端に供給しておく。 ウェッジ102を下降させ、チップ110のAlパ
ッド(接続用電極)にAl線を押しつける。ウェッジ1
02には超音波発振ホーン(図示せず)から振動が伝え
られ、その振動で「第1ボンド」が行われる。このとき
振動と加圧の強さを適当に選ばないと、Al線が切断し
たり接合不良が起こる。 クランプ103は開いてウェッジ102が上昇し、
プリント基板111側のパッド(接続用電極)112の
真上の位置に移動する。実際にはステージが動いて位置
が決まる。 再びウェッジ102が下降してAl線をパッド11
2に押しつけて超音波振動によって「第2ボンド」が終
わる。 クランプ103を閉じてAl線を引きちぎるように
力を加えて切断する。ウェッジ102が上昇しての状
態に戻る。
セスを説明する。 キャピラリ121の先端部に金線122を引き出
し、金線122の先端部を放電により溶融して金球12
2aを作る。 ワイヤクランプ123を開き、キャピラリ121を
下降し、チップ110aのAlパッド(接続用電極)上
に金球122aを圧着する。この際、「第1ボンド」と
呼ばれる熱圧着がなされる。 圧着後、キャピラリ121は上昇し、一旦停止す
る。その際、プリント基板111とチップ110a,1
10bを載せているステージを移動させて、チップ11
0bの所定のAuパッド(接続用電極)部分の上にキャ
ピラリ121がくるようにする。 キャピラリ121を下降させてチップ110bのA
uパッドに金線122を圧着し、「第2ボンド」を行
う。 次にクランプ123を閉じてキャピラリ121を上
昇させ、ワイヤ122を切断し、の状態に戻す。
ェッジボンド法とボールボンド法にはそれぞれ次の不都
合がある。即ち、ウェッジボンド法を行った場合は(図
5参照)、チップ110と該チップに直近の外部端子
(例えば、バンプに通じるランド)を接合しようとする
と、ワイヤ101とチップ110のエッジが接触する可
能性があるため、「第2ボンド」(図5の)を行う地
点をチップ110から離して設定する必要がある。この
場合はパッケージサイズが大きくなってしまうという不
都合ある。
チップ110aと別のチップ110bを接合しようとし
た場合に、第2ボンド側(図6の)で別のチップ11
0bの接続用電極の下面側にダメージを与え、別のチッ
プ110bの層間膜にクラックが入り、電気的リークが
発生するおそれがある。なお、チップ110aに対する
「第1ボンド」の際には金球122aをボンディングす
るので、緩衝的作用をなし、チップ110aの層間膜に
はクラックが入ることはない。
プの集積回路装置のパッケージが小型であり、チップの
ボンディング加工時にダメージを与えるおそれの無い集
積回路装置を提供することである。
に本発明は、複数の半導体ベアチップの接続用電極相互
間および該接続用電極と該接続用電極以外の外部端子と
をボンディングワイヤで接続してなる集積回路装置にお
いて、前記半導体ベアチップの接続用電極相互間のボン
ディングワイヤはウェッジボンド法で接続し、前記接続
用電極と外部端子との間のボンディングワイヤはボール
ボンド法で接続してなることを特徴とする。
の無い半導体ベアチップの接続用電極相互間は、ウェッ
ジボンド法で接続することができるので、半導体ベアチ
ップの層間膜にクラックが入る恐れがない。また、半導
体チップと外部端子との間は一般的なボンディング法で
あるボールボンド法で接続しても、外部端子が接続され
た部材(例えばプリント基板)を傷めることがない。従
って、マルチチップタイプの集積回路装置のパッケージ
を小型化でき、ボンディング加工時に半導体ベアチップ
にダメージを与えることがない。
に基づいて説明する。図1は本実施の形態の平面図であ
り、図2はその断面図である。図1,図2のそれぞれの
構成部材の説明は、前記「従来の技術」の欄において説
明済であるで、重複説明を省略する。なお、図1に示し
た場合は、チップ3,4の接続用電極が各チップの周辺
部に配置されている場合である。
した後、チップ3,4上のそれぞれの接続用電極3a,
3b,4a,4bに対してウェッジボンド法(図5参
照)を実行してワイヤ5の一端をボンディングし、ワイ
ヤ6の両端をボンディングする。この場合は、ウェッジ
ボンド法なのでチップにクラックが入ることはなく、チ
ップを傷めることもない。次いで、前記ワイヤ5のボン
ディングしていない他端をボールボンド法(図6参照)
で外部端子2にボンディングする。この場合は、金球を
備えた一端をボンディングする「第1ボンド」であって
も、金球の無い他端をボンディングする「第2ボンド」
であっても、ボンディング対象が外部端子(例えばプリ
ント基板のランド)なので、クラックを発生させるおそ
れがない。
が終了後、樹脂を用いてプリント基板1、チップ3,
4、ボンディングワイヤ5,6等の全体を封止してマル
チチップタイプの半導体集積回路装置が完成する。 また、前述のの順番とは逆に、先にワイヤ5の一
端を外部端子2にボールボンド法でボンディングし、そ
の後、ワイヤ5の他端およびワイヤ6の両端をチップ
3,4の接続用電極3a,3b,4a,4bにウェッジ
ボンド法でボンディングしてもよい。本実施の形態によ
れば、チップと外部端子との間隔を小さくすることが可
能であり、チップとチップとの間隔を100μmレベル
まで近づけることが可能である。
形例を示す。前記実施の形態ではチップの「周辺部」に
接続用電極が配置してあったのに対し、本変形例ではチ
ップの「内部」にも接続用電極が配置してある場合であ
る。このような接続用電極が「内部」に配置されている
場合でも、本発明を適用できるのは勿論である。
外部端子(ランド)がチップ搭載のプリント基板と同一
基板内に設けられている場合を説明したが、例えば外部
端子が同一プリント基板に搭載されていない場合や、マ
ルチチップパッケージに隣接する電気部品等に接続する
ための外部端子であっても、本発明を適用できるのは勿
論である。
さが殆ど同一で段差の無い半導体ベアチップの接続用電
極相互間は、ウェッジボンド法で接続することができる
ので、半導体ベアチップの層間膜にクラックが入る恐れ
がない。また、半導体チップと外部端子との間は一般的
なボールボンド法で接続しても、外部端子が接続された
部材(例えばプリント基板)を傷めることがない。従っ
て、半導体集積回路装置のパッケージを小型化でき、ボ
ンディング加工時に半導体ベアチップにダメージを与え
ることがない。
3b…チップの周辺部の接続用電極、4…チップ、4
a,4b…チップの周辺部の接続用電極、4c,4d…
チップの内部の接続用電極、5,6…ボンディングワイ
ヤ、10…バンプ
Claims (1)
- 【請求項1】 複数の半導体ベアチップの接続用電極相
互間および該接続用電極と該接続用電極以外の外部端子
とをボンディングワイヤで接続してなる集積回路装置に
おいて、 前記半導体ベアチップの接続用電極相互間のボンディン
グワイヤはウェッジボンド法で接続し、前記接続用電極
と外部端子との間のボンディングワイヤはボールボンド
法で接続してなることを特徴とする集積回路装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23601898A JP2000068316A (ja) | 1998-08-21 | 1998-08-21 | 集積回路装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23601898A JP2000068316A (ja) | 1998-08-21 | 1998-08-21 | 集積回路装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2000068316A true JP2000068316A (ja) | 2000-03-03 |
Family
ID=16994560
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23601898A Pending JP2000068316A (ja) | 1998-08-21 | 1998-08-21 | 集積回路装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2000068316A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100491234B1 (ko) * | 2001-12-03 | 2005-05-25 | 미쓰비시덴키 가부시키가이샤 | 반도체 집적 회로 장치 |
US7256485B2 (en) | 2005-03-18 | 2007-08-14 | Nec Electronics Corporation | Semiconductor device having bonding pad of the first chip thicker than bonding pad of the second chip |
-
1998
- 1998-08-21 JP JP23601898A patent/JP2000068316A/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100491234B1 (ko) * | 2001-12-03 | 2005-05-25 | 미쓰비시덴키 가부시키가이샤 | 반도체 집적 회로 장치 |
US7256485B2 (en) | 2005-03-18 | 2007-08-14 | Nec Electronics Corporation | Semiconductor device having bonding pad of the first chip thicker than bonding pad of the second chip |
US7331737B2 (en) | 2005-03-18 | 2008-02-19 | Nec Electronics Corporation | Method of forming a semiconductor device having bonding pad of the second chip thinner than bonding pad of the first chip |
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