IT202000001630A1 - Circuito di generazione della tensione di bit line per un dispositivo di memoria non volatile e relativo metodo - Google Patents

Circuito di generazione della tensione di bit line per un dispositivo di memoria non volatile e relativo metodo

Info

Publication number
IT202000001630A1
IT202000001630A1 IT102020000001630A IT202000001630A IT202000001630A1 IT 202000001630 A1 IT202000001630 A1 IT 202000001630A1 IT 102020000001630 A IT102020000001630 A IT 102020000001630A IT 202000001630 A IT202000001630 A IT 202000001630A IT 202000001630 A1 IT202000001630 A1 IT 202000001630A1
Authority
IT
Italy
Prior art keywords
memory device
bit line
volatile memory
generation circuit
line voltage
Prior art date
Application number
IT102020000001630A
Other languages
English (en)
Inventor
Maurizio Francesco Perroni
Fabio Enrico Carlo Disegni
Placa Michele La
Cesare Torti
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT102020000001630A priority Critical patent/IT202000001630A1/it
Priority to EP21153082.9A priority patent/EP3859738A1/en
Priority to US17/159,381 priority patent/US11322201B2/en
Priority to CN202120243583.6U priority patent/CN216435467U/zh
Priority to CN202110119728.6A priority patent/CN113257310A/zh
Publication of IT202000001630A1 publication Critical patent/IT202000001630A1/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0023Address circuits or decoders
    • G11C13/0026Bit-line or column circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0023Address circuits or decoders
    • G11C13/0028Word-line or row circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0038Power supply circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14Dummy cell management; Sense reference voltage generators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0042Read using differential sensing, e.g. bit line [BL] and bit line bar [BLB]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0045Read using current through the cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0054Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70Resistive array aspects
    • G11C2213/79Array wherein the access device being a transistor

Landscapes

  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
IT102020000001630A 2020-01-28 2020-01-28 Circuito di generazione della tensione di bit line per un dispositivo di memoria non volatile e relativo metodo IT202000001630A1 (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT102020000001630A IT202000001630A1 (it) 2020-01-28 2020-01-28 Circuito di generazione della tensione di bit line per un dispositivo di memoria non volatile e relativo metodo
EP21153082.9A EP3859738A1 (en) 2020-01-28 2021-01-22 Bit-line voltage generation circuit for a non-volatile memory device and corresponding method
US17/159,381 US11322201B2 (en) 2020-01-28 2021-01-27 Bit-line voltage generation circuit for a non-volatile memory device and corresponding method
CN202120243583.6U CN216435467U (zh) 2020-01-28 2021-01-28 用于非易失性存储器设备的电压产生电路和电子装置
CN202110119728.6A CN113257310A (zh) 2020-01-28 2021-01-28 非易失性存储器设备的位线电压产生电路和对应的方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT102020000001630A IT202000001630A1 (it) 2020-01-28 2020-01-28 Circuito di generazione della tensione di bit line per un dispositivo di memoria non volatile e relativo metodo

Publications (1)

Publication Number Publication Date
IT202000001630A1 true IT202000001630A1 (it) 2021-07-28

Family

ID=70155227

Family Applications (1)

Application Number Title Priority Date Filing Date
IT102020000001630A IT202000001630A1 (it) 2020-01-28 2020-01-28 Circuito di generazione della tensione di bit line per un dispositivo di memoria non volatile e relativo metodo

Country Status (4)

Country Link
US (1) US11322201B2 (it)
EP (1) EP3859738A1 (it)
CN (2) CN216435467U (it)
IT (1) IT202000001630A1 (it)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080298122A1 (en) * 2007-06-01 2008-12-04 Ferdinando Bedeschi Biasing a phase change memory device
US20150092470A1 (en) * 2013-09-30 2015-04-02 Micron Technology, Inc. Configurable reference current generation for non volatile memory

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7009882B2 (en) * 2004-03-03 2006-03-07 Elite Semiconductor Memory Technology, Inc. Bit switch voltage drop compensation during programming in nonvolatile memory
DE602004021599D1 (de) * 2004-09-28 2009-07-30 St Microelectronics Srl Leseschaltung und Leseverfahren für eine nichtflüchtige Speichervorrichtung
US7724595B2 (en) * 2008-01-08 2010-05-25 Macronix International Co., Ltd. Current-mode sense amplifier and sense amplifying method
ITTO20080647A1 (it) * 2008-08-29 2010-02-28 St Microelectronics Srl Decodificatore di colonna per dispositivi di memoria non volatili, in particolare del tipo a cambiamento di fase
US8441382B2 (en) * 2010-03-15 2013-05-14 Stmicroelectronics Pvt. Ltd. Current steering DAC with switched cascode output current source/sink
US9281061B2 (en) 2012-09-19 2016-03-08 Micron Technology, Inc. Methods and apparatuses having a voltage generator with an adjustable voltage drop for representing a voltage drop of a memory cell and/or a current mirror circuit and replica circuit
GB2538258A (en) * 2015-05-12 2016-11-16 Nordic Semiconductor Asa Reference voltages

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080298122A1 (en) * 2007-06-01 2008-12-04 Ferdinando Bedeschi Biasing a phase change memory device
US20150092470A1 (en) * 2013-09-30 2015-04-02 Micron Technology, Inc. Configurable reference current generation for non volatile memory

Also Published As

Publication number Publication date
CN113257310A (zh) 2021-08-13
CN216435467U (zh) 2022-05-03
EP3859738A1 (en) 2021-08-04
US11322201B2 (en) 2022-05-03
US20210233582A1 (en) 2021-07-29

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