IT201900022632A1 - Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente - Google Patents

Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente

Info

Publication number
IT201900022632A1
IT201900022632A1 IT102019000022632A IT201900022632A IT201900022632A1 IT 201900022632 A1 IT201900022632 A1 IT 201900022632A1 IT 102019000022632 A IT102019000022632 A IT 102019000022632A IT 201900022632 A IT201900022632 A IT 201900022632A IT 201900022632 A1 IT201900022632 A1 IT 201900022632A1
Authority
IT
Italy
Prior art keywords
procedure
semiconductor device
semiconductor devices
manufacturing
manufacturing semiconductor
Prior art date
Application number
IT102019000022632A
Other languages
English (en)
Inventor
Federico Giovanni Ziglioli
Alberto Pintus
Pierangelo Magni
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT102019000022632A priority Critical patent/IT201900022632A1/it
Priority to EP20210546.6A priority patent/EP3832701A1/en
Priority to US17/108,270 priority patent/US11417590B2/en
Priority to CN202022877683.2U priority patent/CN214797334U/zh
Priority to CN202011399633.6A priority patent/CN112992687A/zh
Publication of IT201900022632A1 publication Critical patent/IT201900022632A1/it
Priority to US17/887,838 priority patent/US11842954B2/en

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    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/85464—Palladium (Pd) as principal constituent
    • H—ELECTRICITY
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    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
IT102019000022632A 2019-12-02 2019-12-02 Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente IT201900022632A1 (it)

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IT102019000022632A IT201900022632A1 (it) 2019-12-02 2019-12-02 Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente
EP20210546.6A EP3832701A1 (en) 2019-12-02 2020-11-30 A method of manufacturing semiconductor devices and corresponding semiconductor device
US17/108,270 US11417590B2 (en) 2019-12-02 2020-12-01 Method of manufacturing semiconductor devices and corresponding semiconductor device
CN202022877683.2U CN214797334U (zh) 2019-12-02 2020-12-02 半导体器件
CN202011399633.6A CN112992687A (zh) 2019-12-02 2020-12-02 制造半导体器件的方法和对应的半导体器件
US17/887,838 US11842954B2 (en) 2019-12-02 2022-08-15 Method of manufacturing semiconductor devices and corresponding semiconductor device

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070080439A1 (en) * 2005-10-12 2007-04-12 Nec Corporation Wiring board, semiconductor device in which wiring board is used, and method for manufacturing the same
US20100071940A1 (en) * 2007-04-27 2010-03-25 Hitachi Chemical Company, Ltd. Connecting terminal, semiconductor package using connecting terminal and method for manufacturing semiconductor package
US20120305771A1 (en) * 2010-02-12 2012-12-06 Everlight Electronics Co., Ltd. Proximity Sensor Packaging Structure And Manufacturing Method Thereof
US20190043794A1 (en) * 2017-08-03 2019-02-07 General Electric Company Electronics package including integrated structure with backside functionality and method of manufacturing thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6544820B2 (en) * 1997-06-19 2003-04-08 Micron Technology, Inc. Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication
US7196415B2 (en) * 2002-03-22 2007-03-27 Broadcom Corporation Low voltage drop and high thermal performance ball grid array package
TWI415293B (zh) * 2007-12-14 2013-11-11 Advanced Optoelectronic Tech 光電元件之製造方法及其封裝結構

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070080439A1 (en) * 2005-10-12 2007-04-12 Nec Corporation Wiring board, semiconductor device in which wiring board is used, and method for manufacturing the same
US20100071940A1 (en) * 2007-04-27 2010-03-25 Hitachi Chemical Company, Ltd. Connecting terminal, semiconductor package using connecting terminal and method for manufacturing semiconductor package
US20120305771A1 (en) * 2010-02-12 2012-12-06 Everlight Electronics Co., Ltd. Proximity Sensor Packaging Structure And Manufacturing Method Thereof
US20190043794A1 (en) * 2017-08-03 2019-02-07 General Electric Company Electronics package including integrated structure with backside functionality and method of manufacturing thereof

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EP3832701A1 (en) 2021-06-09
US20220392830A1 (en) 2022-12-08
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CN112992687A (zh) 2021-06-18
US11842954B2 (en) 2023-12-12
US11417590B2 (en) 2022-08-16

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