IT1244142B - Dispositivo e metodo per lettura/programmazione migliorata di insiemi di memoria a sola lettura programmabile elettricamente (eprom) a massa virtuale - Google Patents

Dispositivo e metodo per lettura/programmazione migliorata di insiemi di memoria a sola lettura programmabile elettricamente (eprom) a massa virtuale

Info

Publication number
IT1244142B
IT1244142B IT02169590A IT2169590A IT1244142B IT 1244142 B IT1244142 B IT 1244142B IT 02169590 A IT02169590 A IT 02169590A IT 2169590 A IT2169590 A IT 2169590A IT 1244142 B IT1244142 B IT 1244142B
Authority
IT
Italy
Prior art keywords
reading
eprom
programming
electrically programmable
virtual mass
Prior art date
Application number
IT02169590A
Other languages
English (en)
Other versions
IT9021695A0 (it
IT9021695A1 (it
Inventor
Chin S Park
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of IT9021695A0 publication Critical patent/IT9021695A0/it
Publication of IT9021695A1 publication Critical patent/IT9021695A1/it
Application granted granted Critical
Publication of IT1244142B publication Critical patent/IT1244142B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491—Virtual ground arrays
IT02169590A 1989-11-21 1990-10-10 Dispositivo e metodo per lettura/programmazione migliorata di insiemi di memoria a sola lettura programmabile elettricamente (eprom) a massa virtuale IT1244142B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/439,694 US5027321A (en) 1989-11-21 1989-11-21 Apparatus and method for improved reading/programming of virtual ground EPROM arrays

Publications (3)

Publication Number Publication Date
IT9021695A0 IT9021695A0 (it) 1990-10-10
IT9021695A1 IT9021695A1 (it) 1992-04-10
IT1244142B true IT1244142B (it) 1994-07-08

Family

ID=23745766

Family Applications (1)

Application Number Title Priority Date Filing Date
IT02169590A IT1244142B (it) 1989-11-21 1990-10-10 Dispositivo e metodo per lettura/programmazione migliorata di insiemi di memoria a sola lettura programmabile elettricamente (eprom) a massa virtuale

Country Status (6)

Country Link
US (1) US5027321A (it)
JP (1) JPH03176895A (it)
DE (1) DE4035660C2 (it)
FR (1) FR2654866A1 (it)
GB (1) GB2238410B (it)
IT (1) IT1244142B (it)

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US6963505B2 (en) * 2002-10-29 2005-11-08 Aifun Semiconductors Ltd. Method circuit and system for determining a reference voltage
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US6992932B2 (en) 2002-10-29 2006-01-31 Saifun Semiconductors Ltd Method circuit and system for read error detection in a non-volatile memory array
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US6731542B1 (en) * 2002-12-05 2004-05-04 Advanced Micro Devices, Inc. Circuit for accurate memory read operations
US7042562B2 (en) * 2002-12-26 2006-05-09 Amphenol Corp. Systems and methods for inspecting an optical interface
US6967896B2 (en) * 2003-01-30 2005-11-22 Saifun Semiconductors Ltd Address scramble
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US6768679B1 (en) * 2003-02-10 2004-07-27 Advanced Micro Devices, Inc. Selection circuit for accurate memory read operations
US7142464B2 (en) 2003-04-29 2006-11-28 Saifun Semiconductors Ltd. Apparatus and methods for multi-level sensing in a memory array
US7123532B2 (en) 2003-09-16 2006-10-17 Saifun Semiconductors Ltd. Operating array cells with matched reference cells
US7484329B2 (en) 2003-11-20 2009-02-03 Seaweed Bio-Technology Inc. Technology for cultivation of Porphyra and other seaweeds in land-based sea water ponds
CN100378869C (zh) * 2004-01-15 2008-04-02 旺宏电子股份有限公司 闪存的程序化验证方法
US7652930B2 (en) 2004-04-01 2010-01-26 Saifun Semiconductors Ltd. Method, circuit and system for erasing one or more non-volatile memory cells
US7755938B2 (en) * 2004-04-19 2010-07-13 Saifun Semiconductors Ltd. Method for reading a memory array with neighbor effect cancellation
US7366025B2 (en) * 2004-06-10 2008-04-29 Saifun Semiconductors Ltd. Reduced power programming of non-volatile cells
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US7317633B2 (en) 2004-07-06 2008-01-08 Saifun Semiconductors Ltd Protection of NROM devices from charge damage
US7095655B2 (en) * 2004-08-12 2006-08-22 Saifun Semiconductors Ltd. Dynamic matching of signal path and reference path for sensing
US20060036803A1 (en) * 2004-08-16 2006-02-16 Mori Edan Non-volatile memory device controlled by a micro-controller
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US7535765B2 (en) 2004-12-09 2009-05-19 Saifun Semiconductors Ltd. Non-volatile memory device and method for reading cells
US7257025B2 (en) * 2004-12-09 2007-08-14 Saifun Semiconductors Ltd Method for reading non-volatile memory cells
CN1838328A (zh) 2005-01-19 2006-09-27 赛芬半导体有限公司 擦除存储器阵列上存储单元的方法
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US8400841B2 (en) 2005-06-15 2013-03-19 Spansion Israel Ltd. Device to program adjacent storage cells of different NROM cells
US7184313B2 (en) 2005-06-17 2007-02-27 Saifun Semiconductors Ltd. Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cells
US7804126B2 (en) 2005-07-18 2010-09-28 Saifun Semiconductors Ltd. Dense non-volatile memory array and method of fabrication
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US7221138B2 (en) 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
JP2007128583A (ja) * 2005-11-02 2007-05-24 Sharp Corp 不揮発性半導体記憶装置
JP3970299B2 (ja) * 2005-11-25 2007-09-05 シャープ株式会社 半導体記憶装置
WO2007069322A1 (ja) 2005-12-15 2007-06-21 Spansion Llc 半導体装置およびその制御方法
US7352627B2 (en) 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7638835B2 (en) 2006-02-28 2009-12-29 Saifun Semiconductors Ltd. Double density NROM with nitride strips (DDNS)
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7505328B1 (en) 2006-08-14 2009-03-17 Spansion Llc Method and architecture for fast flash memory programming
US7605579B2 (en) 2006-09-18 2009-10-20 Saifun Semiconductors Ltd. Measuring and controlling current consumption and output current of charge pumps
US7706185B2 (en) * 2007-04-09 2010-04-27 Macronix International Co., Ltd. Reading circuitry in memory
US7684244B2 (en) * 2007-05-16 2010-03-23 Atmel Corporation High density non-volatile memory array
US7590001B2 (en) 2007-12-18 2009-09-15 Saifun Semiconductors Ltd. Flash memory with optimized write sector spares
JP5297673B2 (ja) * 2008-03-26 2013-09-25 ラピスセミコンダクタ株式会社 半導体記憶装置
US8134870B2 (en) * 2009-06-16 2012-03-13 Atmel Corporation High-density non-volatile read-only memory arrays and related methods

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Also Published As

Publication number Publication date
IT9021695A0 (it) 1990-10-10
GB2238410B (en) 1994-07-20
GB2238410A (en) 1991-05-29
DE4035660A1 (de) 1991-05-23
GB9005481D0 (en) 1990-05-09
IT9021695A1 (it) 1992-04-10
FR2654866B1 (it) 1995-01-06
US5027321A (en) 1991-06-25
DE4035660C2 (de) 1998-02-19
JPH03176895A (ja) 1991-07-31
FR2654866A1 (fr) 1991-05-24

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