IT1243103B - Metodo per la fabbricazione di un dispositivo a semiconduttori. - Google Patents

Metodo per la fabbricazione di un dispositivo a semiconduttori.

Info

Publication number
IT1243103B
IT1243103B IT02155090A IT2155090A IT1243103B IT 1243103 B IT1243103 B IT 1243103B IT 02155090 A IT02155090 A IT 02155090A IT 2155090 A IT2155090 A IT 2155090A IT 1243103 B IT1243103 B IT 1243103B
Authority
IT
Italy
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Application number
IT02155090A
Other languages
English (en)
Other versions
IT9021550A0 (it
IT9021550A1 (it
Inventor
Kim Kyung-Hun
Kim Seong-Tae
Lee Hyeong-Kyu
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of IT9021550A0 publication Critical patent/IT9021550A0/it
Publication of IT9021550A1 publication Critical patent/IT9021550A1/it
Application granted granted Critical
Publication of IT1243103B publication Critical patent/IT1243103B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Light Receiving Elements (AREA)
IT02155090A 1990-05-21 1990-09-24 Metodo per la fabbricazione di un dispositivo a semiconduttori. IT1243103B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900007268A KR930000718B1 (ko) 1990-05-21 1990-05-21 반도체장치의 제조방법

Publications (3)

Publication Number Publication Date
IT9021550A0 IT9021550A0 (it) 1990-09-24
IT9021550A1 IT9021550A1 (it) 1992-03-24
IT1243103B true IT1243103B (it) 1994-05-24

Family

ID=19299238

Family Applications (1)

Application Number Title Priority Date Filing Date
IT02155090A IT1243103B (it) 1990-05-21 1990-09-24 Metodo per la fabbricazione di un dispositivo a semiconduttori.

Country Status (6)

Country Link
JP (1) JPH0724285B2 (it)
KR (1) KR930000718B1 (it)
DE (1) DE4031414A1 (it)
FR (1) FR2662302B1 (it)
GB (1) GB2244375B (it)
IT (1) IT1243103B (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930006732B1 (ko) * 1991-05-08 1993-07-23 재단법인 한국전자통신연구소 전기적 특성을 갖는 구조물이 매립된 반도체기판 및 그 제조방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62120070A (ja) * 1985-11-20 1987-06-01 Toshiba Corp 半導体記憶装置
JPH0736437B2 (ja) * 1985-11-29 1995-04-19 株式会社日立製作所 半導体メモリの製造方法
JP2569048B2 (ja) * 1987-05-27 1997-01-08 株式会社日立製作所 半導体メモリの製造方法
DE3856143T2 (de) * 1987-06-17 1998-10-29 Fujitsu Ltd Verfahren zum Herstellen einer dynamischen Speicherzelle mit wahlfreiem Zugriff
JPH01154551A (ja) * 1987-12-11 1989-06-16 Oki Electric Ind Co Ltd 半導体メモリ集積回路装置及びその製造方法
KR910010167B1 (ko) * 1988-06-07 1991-12-17 삼성전자 주식회사 스택 캐패시터 dram셀 및 그의 제조방법
US5116776A (en) * 1989-11-30 1992-05-26 Sgs-Thomson Microelectronics, Inc. Method of making a stacked copacitor for dram cell
KR920010204B1 (ko) * 1989-12-02 1992-11-21 삼성전자 주식회사 초고집적 디램셀 및 그 제조방법

Also Published As

Publication number Publication date
FR2662302A1 (fr) 1991-11-22
GB2244375B (en) 1994-06-15
DE4031414A1 (de) 1991-11-28
KR910020901A (ko) 1991-12-20
FR2662302B1 (fr) 1992-08-14
IT9021550A0 (it) 1990-09-24
JPH0424961A (ja) 1992-01-28
GB9020502D0 (en) 1990-10-31
IT9021550A1 (it) 1992-03-24
GB2244375A (en) 1991-11-27
JPH0724285B2 (ja) 1995-03-15
KR930000718B1 (ko) 1993-01-30

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970926