IT1229131B - Matrice di memoria eprom con struttura a tovaglia e procedimento per la sua fabbricazione. - Google Patents
Matrice di memoria eprom con struttura a tovaglia e procedimento per la sua fabbricazione.Info
- Publication number
- IT1229131B IT1229131B IT8919697A IT1969789A IT1229131B IT 1229131 B IT1229131 B IT 1229131B IT 8919697 A IT8919697 A IT 8919697A IT 1969789 A IT1969789 A IT 1969789A IT 1229131 B IT1229131 B IT 1229131B
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- manufacture
- eprom memory
- memory matrix
- tablecloth
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000011159 matrix material Substances 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8919697A IT1229131B (it) | 1989-03-09 | 1989-03-09 | Matrice di memoria eprom con struttura a tovaglia e procedimento per la sua fabbricazione. |
DE69022865T DE69022865T2 (de) | 1989-03-09 | 1990-03-01 | EPROM-Speicheranordnung mit Crosspoint-Konfiguration und Verfahren zu ihrer Herstellung. |
EP90104002A EP0386631B1 (en) | 1989-03-09 | 1990-03-01 | Eprom memory with crosspoint configuration and method for its manufacture |
US07/487,480 US5117269A (en) | 1989-03-09 | 1990-03-02 | Eprom memory array with crosspoint configuration |
JP2057858A JP2814129B2 (ja) | 1989-03-09 | 1990-03-08 | 交差点形状を有するepromメモリアレイおよびその製造のための方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8919697A IT1229131B (it) | 1989-03-09 | 1989-03-09 | Matrice di memoria eprom con struttura a tovaglia e procedimento per la sua fabbricazione. |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8919697A0 IT8919697A0 (it) | 1989-03-09 |
IT1229131B true IT1229131B (it) | 1991-07-22 |
Family
ID=11160468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8919697A IT1229131B (it) | 1989-03-09 | 1989-03-09 | Matrice di memoria eprom con struttura a tovaglia e procedimento per la sua fabbricazione. |
Country Status (5)
Country | Link |
---|---|
US (1) | US5117269A (it) |
EP (1) | EP0386631B1 (it) |
JP (1) | JP2814129B2 (it) |
DE (1) | DE69022865T2 (it) |
IT (1) | IT1229131B (it) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2755781B2 (ja) * | 1990-04-23 | 1998-05-25 | 株式会社東芝 | 半導体記憶装置およびその製造方法 |
TW232092B (it) * | 1991-07-01 | 1994-10-11 | Sharp Kk | |
US5268585A (en) * | 1991-07-01 | 1993-12-07 | Sharp Kabushiki Kaisha | Non-volatile memory and method of manufacturing the same |
US5618742A (en) * | 1992-01-22 | 1997-04-08 | Macronix Internatioal, Ltd. | Method of making flash EPROM with conductive sidewall spacer contacting floating gate |
EP0552531B1 (en) * | 1992-01-22 | 2000-08-16 | Macronix International Co., Ltd. | Non-volatile memory cell and array architecture |
US5526307A (en) * | 1992-01-22 | 1996-06-11 | Macronix International Co., Ltd. | Flash EPROM integrated circuit architecture |
JP3522788B2 (ja) * | 1992-10-29 | 2004-04-26 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
US5313419A (en) * | 1993-02-01 | 1994-05-17 | National Semiconductor Corporation | Self-aligned trench isolation scheme for select transistors in an alternate metal virtual ground (AMG) EPROM array |
DE4333978A1 (de) * | 1993-10-05 | 1995-04-13 | Gold Star Electronics | Nichtflüchtiger Halbleiterspeicher und Verfahren zu dessen Herstellung |
JP3474614B2 (ja) * | 1993-12-14 | 2003-12-08 | マクロニクス インターナショナル カンパニイ リミテッド | 不揮発性半導体メモリ装置及びその動作方法 |
DE69514502T2 (de) * | 1995-05-05 | 2000-08-03 | Stmicroelectronics S.R.L., Agrate Brianza | Nichtflüchtige Speicheranordnung mit Sektoren, deren Grösse und Anzahl bestimmbar sind |
DE69520665T2 (de) * | 1995-05-05 | 2001-08-30 | Stmicroelectronics S.R.L., Agrate Brianza | Anordnung von nichtflüchtigen EEPROM,insbesondere Flash-EEPROM |
EP0741415A1 (en) * | 1995-05-05 | 1996-11-06 | STMicroelectronics S.r.l. | Flash-EEPROM memory with contactless memory cells |
DE69533429T2 (de) * | 1995-06-07 | 2005-08-18 | Macronix International Co. Ltd., Hsinchu | Automatischer progammier-algorithmus für flash-speicher im seitenmodus mit variabler programmierimpulshöhe und -breite |
EP1017097A1 (en) | 1998-12-29 | 2000-07-05 | STMicroelectronics S.r.l. | Manufacturing method of salicide contacts for non-volatile memory |
JP2002050705A (ja) * | 2000-08-01 | 2002-02-15 | Fujitsu Ltd | 半導体記憶装置及びその製造方法 |
KR100455282B1 (ko) * | 2001-01-11 | 2004-11-08 | 삼성전자주식회사 | 램 및 롬 기능을 갖는 단일 트랜지스터를 포함하는 메모리소자와 그 동작 및 제조방법 |
US7030488B2 (en) | 2001-10-30 | 2006-04-18 | Intel Corporation | Packaged combination memory for electronic devices |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54156484A (en) * | 1978-05-30 | 1979-12-10 | Nec Corp | Non-volatile semiconductor memory device |
JPS6048111B2 (ja) * | 1978-05-30 | 1985-10-25 | 日本電気株式会社 | 不揮発性半導体記憶装置 |
US4342099A (en) * | 1979-06-18 | 1982-07-27 | Texas Instruments Incorporated | Electrically erasable programmable MNOS read only memory |
US4554643A (en) * | 1979-06-18 | 1985-11-19 | Texas Instruments Incorporated | Electrically erasable programmable MNOS read only memory |
US4493057A (en) * | 1980-01-07 | 1985-01-08 | Texas Instruments Incorporated | Method of making high density semiconductor device such as floating gate electrically programmable ROM or the like |
JPS56108259A (en) * | 1980-02-01 | 1981-08-27 | Hitachi Ltd | Semiconductor memory device |
JPS5743470A (en) * | 1980-08-29 | 1982-03-11 | Fujitsu Ltd | Semiconductor device |
JPS57102073A (en) * | 1980-12-16 | 1982-06-24 | Mitsubishi Electric Corp | Semiconductor memory and manufacture thereof |
JPS6130063A (ja) * | 1984-07-23 | 1986-02-12 | Nec Corp | 不揮発性半導体記憶装置 |
IT1213218B (it) * | 1984-09-25 | 1989-12-14 | Ates Componenti Elettron | Processo per la fabbricazione di una cella di memoria non volatile con area di ossido sottile di dimensioni molto piccole, e cella ottenuta con il processo suddetto. |
IT1213241B (it) * | 1984-11-07 | 1989-12-14 | Ates Componenti Elettron | Matrice di memoria eprom con celle elementari simmetriche mos e suo metodo di scrittura. |
US4597060A (en) * | 1985-05-01 | 1986-06-24 | Texas Instruments Incorporated | EPROM array and method for fabricating |
US4698900A (en) * | 1986-03-27 | 1987-10-13 | Texas Instruments Incorporated | Method of making a non-volatile memory having dielectric filled trenches |
IT1215380B (it) * | 1987-03-12 | 1990-02-08 | Sgs Microelettronica Spa | Cella di memoria eprom a due semicelle simmetriche con gate flottante separata. |
US4853895A (en) * | 1987-11-30 | 1989-08-01 | Texas Instruments Incorporated | EEPROM including programming electrode extending through the control gate electrode |
US4924437A (en) * | 1987-12-09 | 1990-05-08 | Texas Instruments Incorporated | Erasable programmable memory including buried diffusion source/drain lines and erase lines |
FR2634318B1 (fr) * | 1988-07-13 | 1992-02-21 | Commissariat Energie Atomique | Procede de fabrication d'une cellule de memoire integree |
US5008721A (en) * | 1988-07-15 | 1991-04-16 | Texas Instruments Incorporated | Electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel |
US4912676A (en) * | 1988-08-09 | 1990-03-27 | Texas Instruments, Incorporated | Erasable programmable memory |
FR2635409B1 (fr) * | 1988-08-11 | 1991-08-02 | Sgs Thomson Microelectronics | Memoire de type eprom a haute densite d'integration possedant un facteur de couplage eleve, et son procede de fabrication |
US4994403A (en) * | 1989-12-28 | 1991-02-19 | Texas Instruments Incorporated | Method of making an electrically programmable, electrically erasable memory array cell |
-
1989
- 1989-03-09 IT IT8919697A patent/IT1229131B/it active
-
1990
- 1990-03-01 DE DE69022865T patent/DE69022865T2/de not_active Expired - Fee Related
- 1990-03-01 EP EP90104002A patent/EP0386631B1/en not_active Expired - Lifetime
- 1990-03-02 US US07/487,480 patent/US5117269A/en not_active Expired - Lifetime
- 1990-03-08 JP JP2057858A patent/JP2814129B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69022865D1 (de) | 1995-11-16 |
US5117269A (en) | 1992-05-26 |
EP0386631A2 (en) | 1990-09-12 |
EP0386631B1 (en) | 1995-10-11 |
EP0386631A3 (en) | 1992-12-30 |
JP2814129B2 (ja) | 1998-10-22 |
JPH02291167A (ja) | 1990-11-30 |
IT8919697A0 (it) | 1989-03-09 |
DE69022865T2 (de) | 1996-05-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970329 |