IN2014MN01027A - - Google Patents
Info
- Publication number
- IN2014MN01027A IN2014MN01027A IN1027MUN2014A IN2014MN01027A IN 2014MN01027 A IN2014MN01027 A IN 2014MN01027A IN 1027MUN2014 A IN1027MUN2014 A IN 1027MUN2014A IN 2014MN01027 A IN2014MN01027 A IN 2014MN01027A
- Authority
- IN
- India
- Prior art keywords
- substrate layer
- layer
- wafer
- sheet
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201161560471P | 2011-11-16 | 2011-11-16 | |
| US13/356,717 US9496255B2 (en) | 2011-11-16 | 2012-01-24 | Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same |
| PCT/US2012/065644 WO2013075007A1 (fr) | 2011-11-16 | 2012-11-16 | Jeu de puces empilé ayant une couche isolante et une couche secondaire et son procédé de formation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IN2014MN01027A true IN2014MN01027A (fr) | 2015-05-01 |
Family
ID=48280458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IN1027MUN2014 IN2014MN01027A (fr) | 2011-11-16 | 2012-11-16 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9496255B2 (fr) |
| EP (1) | EP2780942A1 (fr) |
| JP (2) | JP5937225B2 (fr) |
| KR (2) | KR101759689B1 (fr) |
| CN (1) | CN104054175B (fr) |
| IN (1) | IN2014MN01027A (fr) |
| WO (1) | WO2013075007A1 (fr) |
Families Citing this family (49)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104058363B (zh) * | 2013-03-22 | 2016-01-20 | 上海丽恒光微电子科技有限公司 | 基于mems透射光阀的显示装置及其形成方法 |
| US9418985B2 (en) * | 2013-07-16 | 2016-08-16 | Qualcomm Incorporated | Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology |
| US9032353B2 (en) | 2013-10-10 | 2015-05-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and system for three-dimensional layout design of integrated circuit elements in stacked CMOS |
| US9257407B2 (en) * | 2013-10-28 | 2016-02-09 | Qualcomm Incorporated | Heterogeneous channel material integration into wafer |
| US9443758B2 (en) | 2013-12-11 | 2016-09-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Connecting techniques for stacked CMOS devices |
| KR102294812B1 (ko) | 2014-01-23 | 2021-08-31 | 글로벌웨이퍼스 씨오., 엘티디. | 고 비저항 soi 웨이퍼 및 그 제조 방법 |
| US20160043108A1 (en) * | 2014-08-07 | 2016-02-11 | Silanna Semiconductor U.S.A., Inc. | Semiconductor Structure with Multiple Active Layers in an SOI Wafer |
| US9786613B2 (en) * | 2014-08-07 | 2017-10-10 | Qualcomm Incorporated | EMI shield for high frequency layer transferred devices |
| US9899499B2 (en) | 2014-09-04 | 2018-02-20 | Sunedison Semiconductor Limited (Uen201334164H) | High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss |
| WO2016081367A1 (fr) | 2014-11-18 | 2016-05-26 | Sunedison Semiconductor Limited | Substrat de silicium sur isolant de grande résistivité comprenant une couche de piégeage de charge formée par co-implantation he-n2 |
| WO2016081363A1 (fr) * | 2014-11-18 | 2016-05-26 | Sunedison Semiconductor Limited | Système sur puce sur une tranche de semi-conducteur sur isolant, et procédé de fabrication |
| WO2016081313A1 (fr) | 2014-11-18 | 2016-05-26 | Sunedison Semiconductor Limited | Procédé de fabrication de plaquettes de semi-conducteur sur isolant à haute résistivité comprenant couches de piégeage de charges |
| EP3573094B1 (fr) | 2014-11-18 | 2023-01-04 | GlobalWafers Co., Ltd. | Tranche de semiconducteur sur isolant à résistivité élevée et son procédé de fabrication |
| JP6517360B2 (ja) | 2015-03-03 | 2019-05-22 | サンエディソン・セミコンダクター・リミテッドＳｕｎＥｄｉｓｏｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｌｉｍｉｔｅｄ | 膜応力を制御可能なシリコン基板の上に電荷トラップ用多結晶シリコン膜を成長させる方法 |
| JP6637515B2 (ja) | 2015-03-17 | 2020-01-29 | グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． | 半導体オン・インシュレータ構造の製造において使用するための熱的に安定した電荷トラップ層 |
| US9881832B2 (en) | 2015-03-17 | 2018-01-30 | Sunedison Semiconductor Limited (Uen201334164H) | Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof |
| JP6592534B2 (ja) | 2015-06-01 | 2019-10-16 | サンエディソン・セミコンダクター・リミテッドＳｕｎＥｄｉｓｏｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｌｉｍｉｔｅｄ | 多層構造体及びその製造方法 |
| US10332782B2 (en) | 2015-06-01 | 2019-06-25 | Globalwafers Co., Ltd. | Method of manufacturing silicon germanium-on-insulator |
| US20160379943A1 (en) * | 2015-06-25 | 2016-12-29 | Skyworks Solutions, Inc. | Method and apparatus for high performance passive-active circuit integration |
| WO2017019676A1 (fr) * | 2015-07-28 | 2017-02-02 | Skyworks Solutions, Inc. | Dispositif passif intégré sur un substrat de type soi |
| US9768109B2 (en) * | 2015-09-22 | 2017-09-19 | Qualcomm Incorporated | Integrated circuits (ICS) on a glass substrate |
| JP6585978B2 (ja) | 2015-09-24 | 2019-10-02 | ラピスセミコンダクタ株式会社 | 半導体装置および半導体装置の製造方法 |
| SG11201804271QA (en) | 2015-11-20 | 2018-06-28 | Sunedison Semiconductor Ltd | Manufacturing method of smoothing a semiconductor surface |
| US10256863B2 (en) * | 2016-01-11 | 2019-04-09 | Qualcomm Incorporated | Monolithic integration of antenna switch and diplexer |
| US9831115B2 (en) | 2016-02-19 | 2017-11-28 | Sunedison Semiconductor Limited (Uen201334164H) | Process flow for manufacturing semiconductor on insulator structures in parallel |
| WO2017142704A1 (fr) | 2016-02-19 | 2017-08-24 | Sunedison Semiconductor Limited | Substrat de silicium sur isolant à haute résistivité comprenant une couche de piégeage de charge formée sur un substrat à surface rugueuse |
| US10622247B2 (en) | 2016-02-19 | 2020-04-14 | Globalwafers Co., Ltd. | Semiconductor on insulator structure comprising a buried high resistivity layer |
| WO2017155804A1 (fr) | 2016-03-07 | 2017-09-14 | Sunedison Semiconductor Limited | Procédé de fabrication d'une structure de semi-conducteur sur isolant au moyen d'un traitement de liaison sous pression |
| EP3427293B1 (fr) | 2016-03-07 | 2021-05-05 | Globalwafers Co., Ltd. | Structure de semi-conducteur sur isolant contenant une couche d'oxyde fluidifiable à basse température et son procédé de fabrication |
| WO2017155808A1 (fr) | 2016-03-07 | 2017-09-14 | Sunedison Semiconductor Limited | Structure de semi-conducteur sur isolant contenant une couche de nitrure de plasma et son procédé de fabrication |
| WO2017155806A1 (fr) | 2016-03-07 | 2017-09-14 | Sunedison Semiconductor Limited | Structure de semi-conducteur sur isolant contenant une couche d'oxyde de plasma et son procédé de fabrication |
| KR102439602B1 (ko) | 2016-06-08 | 2022-09-01 | 글로벌웨이퍼스 씨오., 엘티디. | 높은 비저항의 단결정 실리콘 잉곳 및 개선된 기계적 강도를 갖는 웨이퍼 |
| US10269617B2 (en) | 2016-06-22 | 2019-04-23 | Globalwafers Co., Ltd. | High resistivity silicon-on-insulator substrate comprising an isolation region |
| US20180068886A1 (en) * | 2016-09-02 | 2018-03-08 | Qualcomm Incorporated | Porous semiconductor layer transfer for an integrated circuit structure |
| US9812580B1 (en) * | 2016-09-06 | 2017-11-07 | Qualcomm Incorporated | Deep trench active device with backside body contact |
| EP3533081B1 (fr) | 2016-10-26 | 2021-04-14 | GlobalWafers Co., Ltd. | Substrat de silicium sur isolant à haute résistivité ayant une efficacité de piégeage de charge améliorée |
| US10468295B2 (en) | 2016-12-05 | 2019-11-05 | GlobalWafers Co. Ltd. | High resistivity silicon-on-insulator structure and method of manufacture thereof |
| CN114093764A (zh) | 2016-12-28 | 2022-02-25 | 太阳能爱迪生半导体有限公司 | 单晶硅晶片 |
| JP6881066B2 (ja) * | 2017-06-19 | 2021-06-02 | 大日本印刷株式会社 | 貫通電極基板および貫通電極基板の製造方法 |
| JP7034186B2 (ja) | 2017-07-14 | 2022-03-11 | サンエディソン・セミコンダクター・リミテッド | 絶縁体上半導体構造の製造方法 |
| WO2019209492A1 (fr) | 2018-04-27 | 2019-10-31 | Globalwafers Co., Ltd. | Formation de plaquettes assistée par la lumière facilitant le transfert de couche à partir d'un substrat donneur semi-conducteur |
| JP2019212729A (ja) * | 2018-06-04 | 2019-12-12 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
| KR102463727B1 (ko) | 2018-06-08 | 2022-11-07 | 글로벌웨이퍼스 씨오., 엘티디. | 얇은 실리콘 층의 전사 방법 |
| EP3675168A1 (fr) * | 2018-12-24 | 2020-07-01 | IMEC vzw | Dispositif et système semi-conducteur de puissance 3d |
| FR3091004B1 (fr) * | 2018-12-24 | 2020-12-04 | Soitec Silicon On Insulator | Structure de type semi-conducteur pour applications digitales et radiofréquences |
| JP2020141090A (ja) * | 2019-03-01 | 2020-09-03 | ソニーセミコンダクタソリューションズ株式会社 | 容量素子、半導体素子基板及び電子機器 |
| KR20220008093A (ko) | 2020-07-13 | 2022-01-20 | 삼성전자주식회사 | 반도체 패키지 및 반도체 패키지의 제조 방법 |
| CN114122134B (zh) * | 2020-09-01 | 2023-12-22 | 苏州华太电子技术股份有限公司 | 一种射频ldmos集成器件 |
| DE102022211198A1 (de) | 2022-10-21 | 2024-05-02 | Robert Bosch Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung eines mikromechanischen Bauelements |
Family Cites Families (20)
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| JP2001102523A (ja) | 1999-09-28 | 2001-04-13 | Sony Corp | 薄膜デバイスおよびその製造方法 |
| US6399997B1 (en) | 2000-08-01 | 2002-06-04 | Megic Corporation | High performance system-on-chip using post passivation process and glass substrates |
| JP4244120B2 (ja) | 2001-06-20 | 2009-03-25 | 株式会社半導体エネルギー研究所 | 発光装置及びその作製方法 |
| TW548860B (en) | 2001-06-20 | 2003-08-21 | Semiconductor Energy Lab | Light emitting device and method of manufacturing the same |
| US7402897B2 (en) | 2002-08-08 | 2008-07-22 | Elm Technology Corporation | Vertical system integration |
| JP2004165269A (ja) | 2002-11-11 | 2004-06-10 | Canon Inc | 積層形半導体装置 |
| JP2004349513A (ja) | 2003-05-22 | 2004-12-09 | Seiko Epson Corp | 薄膜回路装置及びその製造方法、並びに電気光学装置、電子機器 |
| JP5354765B2 (ja) * | 2004-08-20 | 2013-11-27 | カミヤチョウ アイピー ホールディングス | 三次元積層構造を持つ半導体装置の製造方法 |
| US7179719B2 (en) | 2004-09-28 | 2007-02-20 | Sharp Laboratories Of America, Inc. | System and method for hydrogen exfoliation |
| US20070207592A1 (en) | 2006-03-03 | 2007-09-06 | Lu James J | Wafer bonding of damascene-patterned metal/adhesive redistribution layers |
| US7408798B2 (en) | 2006-03-31 | 2008-08-05 | International Business Machines Corporation | 3-dimensional integrated circuit architecture, structure and method for fabrication thereof |
| US20080128901A1 (en) * | 2006-11-30 | 2008-06-05 | Peter Zurcher | Micro-electro-mechanical systems device and integrated circuit device integrated in a three-dimensional semiconductor structure |
| US20080149832A1 (en) * | 2006-12-20 | 2008-06-26 | Miguel Zorn | Scanning Probe Microscope, Nanomanipulator with Nanospool, Motor, nucleotide cassette and Gaming application |
| JP2009067098A (ja) | 2007-09-10 | 2009-04-02 | Harison Toshiba Lighting Corp | 照明装置 |
| JP2009267098A (ja) * | 2008-04-25 | 2009-11-12 | Denso Corp | 半導体装置及びその製造方法 |
| US7943428B2 (en) * | 2008-12-24 | 2011-05-17 | International Business Machines Corporation | Bonded semiconductor substrate including a cooling mechanism |
| US7943423B2 (en) | 2009-03-10 | 2011-05-17 | Infineon Technologies Ag | Reconfigured wafer alignment |
| US9406561B2 (en) | 2009-04-20 | 2016-08-02 | International Business Machines Corporation | Three dimensional integrated circuit integration using dielectric bonding first and through via formation last |
| JP2011029609A (ja) * | 2009-06-26 | 2011-02-10 | Semiconductor Energy Lab Co Ltd | Ｓｏｉ基板の作製方法およびｓｏｉ基板 |
| US9076664B2 (en) * | 2011-10-07 | 2015-07-07 | Freescale Semiconductor, Inc. | Stacked semiconductor die with continuous conductive vias |
-
2012
- 2012-01-24 US US13/356,717 patent/US9496255B2/en active Active
- 2012-11-16 KR KR1020167009373A patent/KR101759689B1/ko active IP Right Grant
- 2012-11-16 EP EP12799674.2A patent/EP2780942A1/fr not_active Ceased
- 2012-11-16 IN IN1027MUN2014 patent/IN2014MN01027A/en unknown
- 2012-11-16 KR KR1020147016198A patent/KR20140100526A/ko active Application Filing
- 2012-11-16 CN CN201280067053.4A patent/CN104054175B/zh active Active
- 2012-11-16 JP JP2014542512A patent/JP5937225B2/ja active Active
- 2012-11-16 WO PCT/US2012/065644 patent/WO2013075007A1/fr active Application Filing
-
2016
- 2016-05-11 JP JP2016095168A patent/JP6099794B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2015503228A (ja) | 2015-01-29 |
| JP6099794B2 (ja) | 2017-03-22 |
| WO2013075007A1 (fr) | 2013-05-23 |
| CN104054175A (zh) | 2014-09-17 |
| KR101759689B1 (ko) | 2017-07-19 |
| US20130120951A1 (en) | 2013-05-16 |
| EP2780942A1 (fr) | 2014-09-24 |
| CN104054175B (zh) | 2018-03-06 |
| JP2016174170A (ja) | 2016-09-29 |
| JP5937225B2 (ja) | 2016-06-22 |
| KR20160044591A (ko) | 2016-04-25 |
| US9496255B2 (en) | 2016-11-15 |
| KR20140100526A (ko) | 2014-08-14 |
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