IL121044A - Dynamic memory device - Google Patents
Dynamic memory deviceInfo
- Publication number
- IL121044A IL121044A IL12104497A IL12104497A IL121044A IL 121044 A IL121044 A IL 121044A IL 12104497 A IL12104497 A IL 12104497A IL 12104497 A IL12104497 A IL 12104497A IL 121044 A IL121044 A IL 121044A
- Authority
- IL
- Israel
- Prior art keywords
- memory device
- dynamic memory
- dynamic
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40622—Partial refresh of memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4067—Refresh in standby or low power modes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US68364296A | 1996-07-15 | 1996-07-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
IL121044A0 IL121044A0 (en) | 1997-11-20 |
IL121044A true IL121044A (en) | 2000-09-28 |
Family
ID=24744893
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IL12104497A IL121044A (en) | 1996-07-15 | 1997-06-09 | Dynamic memory device |
Country Status (7)
Country | Link |
---|---|
US (1) | US5875143A (zh) |
EP (1) | EP0820065A3 (zh) |
JP (1) | JPH1069768A (zh) |
KR (1) | KR980011482A (zh) |
IL (1) | IL121044A (zh) |
SG (1) | SG53006A1 (zh) |
TW (1) | TW331644B (zh) |
Families Citing this family (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5257233A (en) * | 1990-10-31 | 1993-10-26 | Micron Technology, Inc. | Low power memory module using restricted RAM activation |
KR100253276B1 (ko) * | 1997-02-18 | 2000-05-01 | 김영환 | 메모리 소자의 셀 리프레쉬 회로 |
KR100363108B1 (ko) * | 1998-12-30 | 2003-02-20 | 주식회사 하이닉스반도체 | 반도체 메모리장치와 그 장치의 리프레쉬주기 조절방법 |
US6167484A (en) * | 1998-05-12 | 2000-12-26 | Motorola, Inc. | Method and apparatus for leveraging history bits to optimize memory refresh performance |
FI990038A (fi) * | 1999-01-11 | 2000-07-12 | Nokia Mobile Phones Ltd | Menetelmä dynaamisen muistin virkistämiseksi |
KR100355226B1 (ko) * | 1999-01-12 | 2002-10-11 | 삼성전자 주식회사 | 뱅크별로 선택적인 셀프 리프레쉬가 가능한 동적 메모리장치 |
EP2246859B1 (en) * | 1999-11-09 | 2013-10-09 | Fujitsu Semiconductor Limited | Semiconductor memory device, and method of controlling the same |
US6563746B2 (en) * | 1999-11-09 | 2003-05-13 | Fujitsu Limited | Circuit for entering/exiting semiconductor memory device into/from low power consumption mode and method of controlling internal circuit at low power consumption mode |
JP2001338489A (ja) * | 2000-05-24 | 2001-12-07 | Mitsubishi Electric Corp | 半導体装置 |
US20020138690A1 (en) * | 2001-03-23 | 2002-09-26 | Simmonds Stephen M. | System and method for performing a partial DRAM refresh |
US6590822B2 (en) * | 2001-05-07 | 2003-07-08 | Samsung Electronics Co., Ltd. | System and method for performing partial array self-refresh operation in a semiconductor memory device |
KR100424178B1 (ko) | 2001-09-20 | 2004-03-24 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 내부어드레스 발생회로 |
US20030053361A1 (en) * | 2001-09-20 | 2003-03-20 | Haitao Zhang | EDRAM based architecture |
US6738861B2 (en) * | 2001-09-20 | 2004-05-18 | Intel Corporation | System and method for managing data in memory for reducing power consumption |
DE10154770B4 (de) * | 2001-11-08 | 2004-11-18 | Infineon Technologies Ag | Dynamische Speichervorrichtung mit einer Auswahleinrichtung für das selektive Ausblenden von nicht belegten Speicherzellen beim Refresh |
US6570794B1 (en) | 2001-12-27 | 2003-05-27 | Infineon Technologies North America Corp. | Twisted bit-line compensation for DRAM having redundancy |
US6608783B2 (en) | 2001-12-27 | 2003-08-19 | Infineon Technologies North America Corp. | Twisted bit-line compensation |
US6603694B1 (en) | 2002-02-05 | 2003-08-05 | Infineon Technologies North America Corp. | Dynamic memory refresh circuitry |
US6618314B1 (en) | 2002-03-04 | 2003-09-09 | Cypress Semiconductor Corp. | Method and architecture for reducing the power consumption for memory devices in refresh operations |
DE10211570A1 (de) * | 2002-03-15 | 2003-10-09 | Infineon Technologies Ag | Verfahren zum Betrieb eines linearen Speichers und digitale Schaltungsanordnung mit einem linearen Speicher |
US6665224B1 (en) | 2002-05-22 | 2003-12-16 | Infineon Technologies Ag | Partial refresh for synchronous dynamic random access memory (SDRAM) circuits |
US6778455B2 (en) * | 2002-07-24 | 2004-08-17 | Micron Technology, Inc. | Method and apparatus for saving refresh current |
KR100535071B1 (ko) * | 2002-11-07 | 2005-12-07 | 주식회사 하이닉스반도체 | 셀프 리프레쉬 장치 |
AU2003227363A1 (en) * | 2003-04-24 | 2004-11-19 | Fujitsu Limited | Semiconductor memory |
US6862238B1 (en) | 2003-09-25 | 2005-03-01 | Infineon Technologies Ag | Memory system with reduced refresh current |
US20050078538A1 (en) * | 2003-09-30 | 2005-04-14 | Rainer Hoehler | Selective address-range refresh |
US7342841B2 (en) * | 2004-12-21 | 2008-03-11 | Intel Corporation | Method, apparatus, and system for active refresh management |
US7158434B2 (en) * | 2005-04-29 | 2007-01-02 | Infineon Technologies, Ag | Self-refresh circuit with optimized power consumption |
KR100652414B1 (ko) * | 2005-06-10 | 2006-12-01 | 삼성전자주식회사 | 딥 파워 다운 모드일 때 일부 데이터를 보존할 수 있는메모리 장치 및 그 동작 방법 |
US7830690B2 (en) * | 2006-10-30 | 2010-11-09 | Intel Corporation | Memory module thermal management |
US7983108B2 (en) * | 2008-08-04 | 2011-07-19 | Micron Technology, Inc. | Row mask addressing |
US7990795B2 (en) * | 2009-02-19 | 2011-08-02 | Freescale Semiconductor, Inc. | Dynamic random access memory (DRAM) refresh |
JP2009295274A (ja) * | 2009-09-16 | 2009-12-17 | Renesas Technology Corp | 半導体装置 |
KR101796116B1 (ko) | 2010-10-20 | 2017-11-10 | 삼성전자 주식회사 | 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법 |
US9159396B2 (en) * | 2011-06-30 | 2015-10-13 | Lattice Semiconductor Corporation | Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices |
KR20150017276A (ko) | 2013-08-06 | 2015-02-16 | 삼성전자주식회사 | 리프레쉬 레버리징 효율을 향상시키는 휘발성 메모리 장치의 리프레쉬 방법 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6313197A (ja) * | 1986-07-03 | 1988-01-20 | Nec Corp | ダイナミツク型半導体記憶装置 |
JPS63282997A (ja) * | 1987-05-15 | 1988-11-18 | Mitsubishi Electric Corp | ブロツクアクセスメモリ |
US5283885A (en) * | 1988-09-09 | 1994-02-01 | Werner Hollerbauer | Storage module including a refresh device for storing start and stop refresh addresses |
US5247655A (en) * | 1989-11-07 | 1993-09-21 | Chips And Technologies, Inc. | Sleep mode refresh apparatus |
JP3018498B2 (ja) * | 1990-11-30 | 2000-03-13 | 日本電気株式会社 | 半導体記憶装置 |
KR0126243B1 (ko) * | 1992-06-29 | 1997-12-26 | 세끼자와 다다시 | 자기재생기능을 갖는 반도체 메모리장치 |
US5331601A (en) * | 1993-02-04 | 1994-07-19 | United Memories, Inc. | DRAM variable row select |
US5469559A (en) * | 1993-07-06 | 1995-11-21 | Dell Usa, L.P. | Method and apparatus for refreshing a selected portion of a dynamic random access memory |
-
1997
- 1997-06-09 IL IL12104497A patent/IL121044A/xx not_active IP Right Cessation
- 1997-06-25 EP EP97110375A patent/EP0820065A3/en not_active Withdrawn
- 1997-07-02 SG SG1997002347A patent/SG53006A1/en unknown
- 1997-07-07 KR KR1019970031352A patent/KR980011482A/ko not_active Application Discontinuation
- 1997-07-11 JP JP9202436A patent/JPH1069768A/ja active Pending
- 1997-07-15 TW TW086110014A patent/TW331644B/zh not_active IP Right Cessation
- 1997-11-24 US US08/976,835 patent/US5875143A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR980011482A (ko) | 1998-04-30 |
SG53006A1 (en) | 1998-09-28 |
JPH1069768A (ja) | 1998-03-10 |
IL121044A0 (en) | 1997-11-20 |
EP0820065A3 (en) | 1999-09-15 |
EP0820065A2 (en) | 1998-01-21 |
US5875143A (en) | 1999-02-23 |
TW331644B (en) | 1998-05-11 |
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Legal Events
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EXP | Patent expired |