FI990038A - Menetelmä dynaamisen muistin virkistämiseksi - Google Patents

Menetelmä dynaamisen muistin virkistämiseksi Download PDF

Info

Publication number
FI990038A
FI990038A FI990038A FI990038A FI990038A FI 990038 A FI990038 A FI 990038A FI 990038 A FI990038 A FI 990038A FI 990038 A FI990038 A FI 990038A FI 990038 A FI990038 A FI 990038A
Authority
FI
Finland
Prior art keywords
refreshing
procedure
dynamic memory
dynamic
memory
Prior art date
Application number
FI990038A
Other languages
English (en)
Swedish (sv)
Other versions
FI990038A0 (fi
Inventor
Matti Floman
Ari Aho
Markku Lipponen
Mikko Siltanen
Original Assignee
Nokia Mobile Phones Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Mobile Phones Ltd filed Critical Nokia Mobile Phones Ltd
Priority to FI990038A priority Critical patent/FI990038A/fi
Publication of FI990038A0 publication Critical patent/FI990038A0/fi
Priority to EP99660193A priority patent/EP1020867B1/en
Priority to DE69942246T priority patent/DE69942246D1/de
Priority to US09/481,784 priority patent/US6857042B1/en
Publication of FI990038A publication Critical patent/FI990038A/fi

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40622Partial refresh of memory arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072Circuits for initialization, powering up or down, clearing memory or presetting
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045Read-write mode select circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/16Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406Refreshing of dynamic cells
    • G11C2211/4067Refresh in standby or low power modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
FI990038A 1999-01-11 1999-01-11 Menetelmä dynaamisen muistin virkistämiseksi FI990038A (fi)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FI990038A FI990038A (fi) 1999-01-11 1999-01-11 Menetelmä dynaamisen muistin virkistämiseksi
EP99660193A EP1020867B1 (en) 1999-01-11 1999-12-22 Method for refreshing a dynamic memory
DE69942246T DE69942246D1 (de) 1999-01-11 1999-12-22 Verfahren zum Auffrischen eines dynamischen Speichers
US09/481,784 US6857042B1 (en) 1999-01-11 2000-01-11 Method for refreshing a dynamic memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI990038A FI990038A (fi) 1999-01-11 1999-01-11 Menetelmä dynaamisen muistin virkistämiseksi

Publications (2)

Publication Number Publication Date
FI990038A0 FI990038A0 (fi) 1999-01-11
FI990038A true FI990038A (fi) 2000-07-12

Family

ID=8553307

Family Applications (1)

Application Number Title Priority Date Filing Date
FI990038A FI990038A (fi) 1999-01-11 1999-01-11 Menetelmä dynaamisen muistin virkistämiseksi

Country Status (4)

Country Link
US (1) US6857042B1 (fi)
EP (1) EP1020867B1 (fi)
DE (1) DE69942246D1 (fi)
FI (1) FI990038A (fi)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6728798B1 (en) * 2000-07-28 2004-04-27 Micron Technology, Inc. Synchronous flash memory with status burst output
FR2828616B1 (fr) * 2001-08-09 2004-01-30 Sagem Module de memoire pour telephone mobile
US7573939B2 (en) * 2002-01-11 2009-08-11 Sony Corporation Memory cell circuit, memory device, motion vector detection device, and motion compensation prediction coding device
EP1408510A3 (en) * 2002-05-17 2005-05-18 Matsushita Electric Industrial Co., Ltd. Memory control apparatus, method and program
US20050078538A1 (en) * 2003-09-30 2005-04-14 Rainer Hoehler Selective address-range refresh
GB2426360A (en) * 2005-05-18 2006-11-22 Symbian Software Ltd Reorganisation of memory for conserving power in a computing device
KR101796116B1 (ko) 2010-10-20 2017-11-10 삼성전자 주식회사 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법
US10447433B2 (en) 2014-11-21 2019-10-15 Telefonaktiebolaget Lm Ericsson (Publ) Signal processing apparatus and method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4639858A (en) * 1983-07-05 1987-01-27 Honeywell Information Systems Inc. Apparatus and method for testing and verifying the refresh logic of dynamic MOS memories
US5283885A (en) * 1988-09-09 1994-02-01 Werner Hollerbauer Storage module including a refresh device for storing start and stop refresh addresses
US5148546A (en) * 1991-04-22 1992-09-15 Blodgett Greg A Method and system for minimizing power demands on portable computers and the like by refreshing selected dram cells
US5469559A (en) * 1993-07-06 1995-11-21 Dell Usa, L.P. Method and apparatus for refreshing a selected portion of a dynamic random access memory
US5721860A (en) * 1994-05-24 1998-02-24 Intel Corporation Memory controller for independently supporting synchronous and asynchronous DRAM memories
US5923829A (en) * 1994-08-25 1999-07-13 Ricoh Company, Ltd. Memory system, memory control system and image processing system
US5557578A (en) * 1995-05-01 1996-09-17 Apple Computer, Inc. Dynamic memory refresh controller and method
FI101669B1 (fi) * 1996-02-23 1998-07-31 Nokia Mobile Phones Ltd Monipalvelumatkaviestin
IL121044A (en) * 1996-07-15 2000-09-28 Motorola Inc Dynamic memory device
US6212599B1 (en) * 1997-11-26 2001-04-03 Intel Corporation Method and apparatus for a memory control system including a secondary controller for DRAM refresh during sleep mode

Also Published As

Publication number Publication date
US6857042B1 (en) 2005-02-15
FI990038A0 (fi) 1999-01-11
EP1020867A1 (en) 2000-07-19
DE69942246D1 (de) 2010-05-27
EP1020867B1 (en) 2010-04-14

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