IL115147A - Processing circuitry and a method of assigning a common bus to a plurality of processors - Google Patents
Processing circuitry and a method of assigning a common bus to a plurality of processorsInfo
- Publication number
- IL115147A IL115147A IL11514795A IL11514795A IL115147A IL 115147 A IL115147 A IL 115147A IL 11514795 A IL11514795 A IL 11514795A IL 11514795 A IL11514795 A IL 11514795A IL 115147 A IL115147 A IL 115147A
- Authority
- IL
- Israel
- Prior art keywords
- processors
- assigning
- processing circuitry
- common bus
- bus
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Microcomputers (AREA)
- Information Transfer Systems (AREA)
- Chemical Or Physical Treatment Of Fibers (AREA)
- Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
- Surgical Instruments (AREA)
- Electrophonic Musical Instruments (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9418753A GB9418753D0 (en) | 1994-09-16 | 1994-09-16 | Process circuitry |
Publications (2)
Publication Number | Publication Date |
---|---|
IL115147A0 IL115147A0 (en) | 1995-12-31 |
IL115147A true IL115147A (en) | 1999-09-22 |
Family
ID=10761486
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IL11514795A IL115147A (en) | 1994-09-16 | 1995-09-01 | Processing circuitry and a method of assigning a common bus to a plurality of processors |
Country Status (14)
Country | Link |
---|---|
EP (1) | EP0781433B1 (es) |
JP (1) | JPH10505925A (es) |
AT (1) | ATE174139T1 (es) |
AU (1) | AU3477695A (es) |
BR (1) | BR9509071A (es) |
DE (1) | DE69506427T2 (es) |
ES (1) | ES2127554T3 (es) |
FI (1) | FI971093A (es) |
GB (1) | GB9418753D0 (es) |
IL (1) | IL115147A (es) |
IN (1) | IN184524B (es) |
MX (1) | MX9701974A (es) |
WO (1) | WO1996008774A1 (es) |
ZA (1) | ZA957740B (es) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5130754B2 (ja) * | 2007-03-15 | 2013-01-30 | 富士通セミコンダクター株式会社 | 半導体集積回路及びメモリシステム |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4837736A (en) * | 1987-05-01 | 1989-06-06 | Digital Equipment Corporation | Backplane bus with default control |
CA2021826A1 (en) * | 1989-10-23 | 1991-04-24 | Darryl Edmond Judice | Delay logic for preventing cpu lockout from bus ownership |
SE9203016L (sv) * | 1992-10-14 | 1994-04-15 | Ericsson Telefon Ab L M | Signalbehandlingssystem med delat dataminne |
EP0654743A1 (en) * | 1993-11-19 | 1995-05-24 | International Business Machines Corporation | Computer system having a DSP local bus |
-
1994
- 1994-09-16 GB GB9418753A patent/GB9418753D0/en active Pending
-
1995
- 1995-08-24 IN IN1004CA1995 patent/IN184524B/en unknown
- 1995-09-01 IL IL11514795A patent/IL115147A/xx not_active IP Right Cessation
- 1995-09-08 JP JP8509978A patent/JPH10505925A/ja active Pending
- 1995-09-08 AT AT95931282T patent/ATE174139T1/de not_active IP Right Cessation
- 1995-09-08 DE DE69506427T patent/DE69506427T2/de not_active Expired - Fee Related
- 1995-09-08 ES ES95931282T patent/ES2127554T3/es not_active Expired - Lifetime
- 1995-09-08 AU AU34776/95A patent/AU3477695A/en not_active Abandoned
- 1995-09-08 BR BR9509071A patent/BR9509071A/pt not_active Application Discontinuation
- 1995-09-08 MX MX9701974A patent/MX9701974A/es not_active Application Discontinuation
- 1995-09-08 EP EP95931282A patent/EP0781433B1/en not_active Expired - Lifetime
- 1995-09-08 WO PCT/GB1995/002130 patent/WO1996008774A1/en active IP Right Grant
- 1995-09-14 ZA ZA957740A patent/ZA957740B/xx unknown
-
1997
- 1997-03-14 FI FI971093A patent/FI971093A/fi unknown
Also Published As
Publication number | Publication date |
---|---|
FI971093A0 (fi) | 1997-03-14 |
AU3477695A (en) | 1996-03-29 |
JPH10505925A (ja) | 1998-06-09 |
IL115147A0 (en) | 1995-12-31 |
MX9701974A (es) | 1998-02-28 |
ES2127554T3 (es) | 1999-04-16 |
FI971093A (fi) | 1997-03-14 |
EP0781433B1 (en) | 1998-12-02 |
EP0781433A1 (en) | 1997-07-02 |
IN184524B (es) | 2000-09-02 |
GB9418753D0 (en) | 1994-11-02 |
ZA957740B (en) | 1996-05-06 |
ATE174139T1 (de) | 1998-12-15 |
WO1996008774A1 (en) | 1996-03-21 |
DE69506427T2 (de) | 1999-08-05 |
DE69506427D1 (de) | 1999-01-14 |
BR9509071A (pt) | 1997-12-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69130703D1 (de) | Chipschnittstellenanordnung | |
EP0458104A3 (en) | Power controller for multiprocessor computing system having shared input/output devices | |
EP0267464A3 (en) | Method for controlling processor access to input/output devices | |
MY119755A (en) | Dynamic de-registering of devices in system with multiple communication protocols | |
AU6934296A (en) | Method and apparatus for rapid functionality downloading to a volatile memory | |
ATE36763T1 (de) | Mikroprozessorsystem zur steuerung von arbeitsablaeufen. | |
IL115147A (en) | Processing circuitry and a method of assigning a common bus to a plurality of processors | |
CA2243599A1 (en) | Processor system | |
KR830010423A (ko) | 데이터 처리 시스템의 데이터 교환방식 | |
ATE315253T1 (de) | Adaptives prozessorsystem | |
JPS55156494A (en) | Alternation system between exchange unit | |
ES8502273A1 (es) | Un controlador de sistema informatico. | |
JPS54161854A (en) | Input/output control system for information processor | |
JPS6460114A (en) | Data arithmetic unit | |
NO840162L (no) | Tidsdelt, multiplekset adresse- og styresystem | |
JPS6455657A (en) | Data processor | |
JPS57150051A (en) | Memory control system | |
JPS57150049A (en) | Memory control system | |
JPH0792783B2 (ja) | Ioモジュ−ル制御方式 | |
KR20010066164A (ko) | 공유 메모리를 이용한 통신 장치 | |
JPS54109740A (en) | Program loading circuit | |
JPS56149853A (en) | Control memory access system of communication control unit | |
JPS57157353A (en) | Instruction code converting system for computer | |
TH6004B (th) | การลดการสิ้นเปลืองกำลังในตัวประมวลผลแบบดิจิตอล | |
JPS56146392A (en) | Time-division switchboard control system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FF | Patent granted | ||
KB | Patent renewed | ||
MM9K | Patent not in force due to non-payment of renewal fees |