HK74086A - Method of forming an isolation region of a mos semiconductor device - Google Patents

Method of forming an isolation region of a mos semiconductor device

Info

Publication number
HK74086A
HK74086A HK740/86A HK74086A HK74086A HK 74086 A HK74086 A HK 74086A HK 740/86 A HK740/86 A HK 740/86A HK 74086 A HK74086 A HK 74086A HK 74086 A HK74086 A HK 74086A
Authority
HK
Hong Kong
Prior art keywords
forming
semiconductor device
isolation region
mos semiconductor
mos
Prior art date
Application number
HK740/86A
Other languages
English (en)
Inventor
Juri Kato
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP9860381A external-priority patent/JPS58149A/ja
Priority claimed from JP9860281A external-priority patent/JPS58182A/ja
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of HK74086A publication Critical patent/HK74086A/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
HK740/86A 1981-06-25 1986-10-02 Method of forming an isolation region of a mos semiconductor device HK74086A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9860381A JPS58149A (ja) 1981-06-25 1981-06-25 半導体装置
JP9860281A JPS58182A (ja) 1981-06-25 1981-06-25 半導体装置

Publications (1)

Publication Number Publication Date
HK74086A true HK74086A (en) 1986-10-10

Family

ID=26439736

Family Applications (1)

Application Number Title Priority Date Filing Date
HK740/86A HK74086A (en) 1981-06-25 1986-10-02 Method of forming an isolation region of a mos semiconductor device

Country Status (5)

Country Link
US (2) US4800417A (xx)
DE (1) DE3223842A1 (xx)
GB (1) GB2104722B (xx)
HK (1) HK74086A (xx)
NL (1) NL190254C (xx)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4569701A (en) * 1984-04-05 1986-02-11 At&T Bell Laboratories Technique for doping from a polysilicon transfer layer
US5212109A (en) * 1989-05-24 1993-05-18 Nissan Motor Co., Ltd. Method for forming PN junction isolation regions by forming buried regions of doped polycrystalline or amorphous semiconductor
US5098862A (en) * 1990-11-07 1992-03-24 Gte Laboratories Incorporated Method of making ohmic electrical contact to a matrix of semiconductor material
KR940003070A (ko) * 1992-07-10 1994-02-19 문정환 반도체소자의 단위소자간 격리방법
DE19706282A1 (de) * 1997-02-18 1998-08-20 Siemens Ag Verfahren zur Erzeugung einer Transistorstruktur
KR100244271B1 (ko) 1997-05-06 2000-02-01 김영환 반도체소자 구조 및 제조방법
FR2768555B1 (fr) 1997-09-12 2001-11-23 Commissariat Energie Atomique Structure microelectronique comportant une partie de basse tension munie d'une protection contre une partie de haute tension et procede d'obtention de cette protection
KR100285701B1 (ko) * 1998-06-29 2001-04-02 윤종용 트렌치격리의제조방법및그구조
US6245635B1 (en) * 1998-11-30 2001-06-12 United Microelectronics Corp. Method of fabricating shallow trench isolation
US6177317B1 (en) * 1999-04-14 2001-01-23 Macronix International Co., Ltd. Method of making nonvolatile memory devices having reduced resistance diffusion regions
CN101069279B (zh) * 2004-10-25 2012-05-09 瑞萨电子株式会社 半导体器件及其制造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3475661A (en) * 1966-02-09 1969-10-28 Sony Corp Semiconductor device including polycrystalline areas among monocrystalline areas
JPS4912795B1 (xx) * 1968-12-05 1974-03-27
NL166156C (nl) * 1971-05-22 1981-06-15 Philips Nv Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan.
US4026736A (en) * 1974-01-03 1977-05-31 Motorola, Inc. Integrated semiconductor structure with combined dielectric and PN junction isolation including fabrication method therefor
US4140558A (en) * 1978-03-02 1979-02-20 Bell Telephone Laboratories, Incorporated Isolation of integrated circuits utilizing selective etching and diffusion
US4255207A (en) * 1979-04-09 1981-03-10 Harris Corporation Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
US4252579A (en) * 1979-05-07 1981-02-24 International Business Machines Corporation Method for making single electrode U-MOSFET random access memory utilizing reactive ion etching and polycrystalline deposition
JPS5636143A (en) * 1979-08-31 1981-04-09 Hitachi Ltd Manufacture of semiconductor device
US4309716A (en) * 1979-10-22 1982-01-05 International Business Machines Corporation Bipolar dynamic memory cell
US4255209A (en) * 1979-12-21 1981-03-10 Harris Corporation Process of fabricating an improved I2 L integrated circuit utilizing diffusion and epitaxial deposition
US4393391A (en) * 1980-06-16 1983-07-12 Supertex, Inc. Power MOS transistor with a plurality of longitudinal grooves to increase channel conducting area
US4409609A (en) * 1981-03-18 1983-10-11 Fujitsu Limited Semiconductor device and method of manufacturing the same
JPS57204133A (en) * 1981-06-10 1982-12-14 Hitachi Ltd Manufacture of semiconductor integrated circuit
JPS5896751A (ja) * 1981-12-03 1983-06-08 Seiko Epson Corp 半導体装置
US4473598A (en) * 1982-06-30 1984-09-25 International Business Machines Corporation Method of filling trenches with silicon and structures
JPS5961045A (ja) * 1982-09-29 1984-04-07 Fujitsu Ltd 半導体装置の製造方法
JPS5965448A (ja) * 1982-10-06 1984-04-13 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS60124839A (ja) * 1983-12-09 1985-07-03 Fujitsu Ltd 半導体装置の製造方法
US4569701A (en) * 1984-04-05 1986-02-11 At&T Bell Laboratories Technique for doping from a polysilicon transfer layer
US4528047A (en) * 1984-06-25 1985-07-09 International Business Machines Corporation Method for forming a void free isolation structure utilizing etch and refill techniques
US4554728A (en) * 1984-06-27 1985-11-26 International Business Machines Corporation Simplified planarization process for polysilicon filled trenches
JPS61158158A (ja) * 1984-12-28 1986-07-17 Sony Corp 半導体装置の製造方法
JPS61220353A (ja) * 1985-03-26 1986-09-30 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
DE3223842C2 (xx) 1988-11-10
US4800417A (en) 1989-01-24
DE3223842A1 (de) 1983-01-13
NL190254B (nl) 1993-07-16
US4833098A (en) 1989-05-23
NL190254C (nl) 1993-12-16
NL8202594A (nl) 1983-01-17
GB2104722B (en) 1985-04-24
GB2104722A (en) 1983-03-09

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Legal Events

Date Code Title Description
PE Patent expired