HK1082820A1 - Reset circuit and digital communication device - Google Patents

Reset circuit and digital communication device

Info

Publication number
HK1082820A1
HK1082820A1 HK06101723.6A HK06101723A HK1082820A1 HK 1082820 A1 HK1082820 A1 HK 1082820A1 HK 06101723 A HK06101723 A HK 06101723A HK 1082820 A1 HK1082820 A1 HK 1082820A1
Authority
HK
Hong Kong
Prior art keywords
communication device
reset circuit
digital communication
digital
reset
Prior art date
Application number
HK06101723.6A
Other languages
English (en)
Inventor
Yasuaki Ishikawa
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Publication of HK1082820A1 publication Critical patent/HK1082820A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
HK06101723.6A 2003-04-25 2006-02-09 Reset circuit and digital communication device HK1082820A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003121721 2003-04-25
PCT/JP2004/005859 WO2004097608A1 (ja) 2003-04-25 2004-04-23 リセット回路とディジタル通信装置

Publications (1)

Publication Number Publication Date
HK1082820A1 true HK1082820A1 (en) 2006-06-16

Family

ID=33410051

Family Applications (1)

Application Number Title Priority Date Filing Date
HK06101723.6A HK1082820A1 (en) 2003-04-25 2006-02-09 Reset circuit and digital communication device

Country Status (6)

Country Link
US (1) US7239187B2 (zh)
EP (1) EP1619573B1 (zh)
JP (1) JP4127283B2 (zh)
CN (1) CN1781066B (zh)
HK (1) HK1082820A1 (zh)
WO (1) WO2004097608A1 (zh)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7083598B2 (en) 2002-08-27 2006-08-01 Jan Liska Transcutan catheter assembly
JP4308735B2 (ja) * 2004-09-06 2009-08-05 Ｏｋｉセミコンダクタ株式会社 半導体回路
US7586350B2 (en) * 2005-09-28 2009-09-08 Hynix Semiconductor Inc. Circuit and method for initializing an internal logic unit in a semiconductor memory device
JP4750564B2 (ja) * 2006-01-26 2011-08-17 富士通セミコンダクター株式会社 リセット信号生成回路
US8400745B1 (en) * 2008-04-30 2013-03-19 Netapp, Inc. Fuse apparatus
CN101359904B (zh) * 2008-07-25 2010-06-02 北京航空航天大学 一种防止恒复位的多路互隔离复位电路
WO2010032409A1 (ja) 2008-09-17 2010-03-25 パナソニック株式会社 画像処理装置、撮像装置、評価装置、画像処理方法及び光学系評価方法
EP2596412B1 (en) * 2010-07-20 2018-01-03 NXP USA, Inc. Electronic circuit, safety critical system, and method for providing a reset signal
JP5501320B2 (ja) * 2011-09-30 2014-05-21 京セラドキュメントソリューションズ株式会社 電子回路
CN104850203B (zh) * 2015-06-10 2019-02-05 联想(北京)有限公司 一种电子设备复位方法及电子设备
DE102016200245B3 (de) * 2016-01-12 2016-09-29 Siemens Aktiengesellschaft Verfahren zur Einstellung der Pull-Widerstände eines elektronischen Bausteins
CN107463236B (zh) * 2017-08-28 2023-05-12 珠海格力电器股份有限公司 一种复位检测电路和复位检测方法
US11269708B2 (en) 2019-12-30 2022-03-08 Micron Technology, Inc. Real-time trigger to dump an error log
US11269707B2 (en) * 2019-12-30 2022-03-08 Micron Technology, Inc. Real-time trigger to dump an error log
CN113467591B (zh) * 2021-07-08 2023-04-11 南昌华勤电子科技有限公司 复合信号复位电路、方法及服务器
US11681324B2 (en) 2021-10-01 2023-06-20 Achronix Semiconductor Corporation Synchronous reset deassertion circuit

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0792793B2 (ja) 1987-04-17 1995-10-09 富士通テン株式会社 マイクロコンピユ−タ
JPH04218822A (ja) * 1990-12-19 1992-08-10 Sony Corp 機器制御用のマイクロプロセッサ
JP2776093B2 (ja) * 1991-10-24 1998-07-16 日本電気株式会社 リセット回路
US5323066A (en) 1992-06-01 1994-06-21 Motorola, Inc. Method and apparatus for performing power on reset initialization in a data processing system
JPH06175751A (ja) 1992-12-08 1994-06-24 Toshiba Corp Ｃｐｕリセット回路
JPH07319588A (ja) * 1994-05-27 1995-12-08 Fujitsu Denso Ltd 暴走防止制御方式
DE19627362C2 (de) * 1996-07-06 1998-11-26 Bosch Gmbh Robert Schaltung zur Initialisierung und Überwachung eines Mikroprozessors
JPH1097340A (ja) * 1996-09-20 1998-04-14 Toshiba Corp 携帯型情報機器
US5912570A (en) * 1997-01-08 1999-06-15 Nokia Mobile Phones Limited Application specific integrated circuit (ASIC) having improved reset deactivation
JPH10289031A (ja) * 1997-04-11 1998-10-27 Nec Gumma Ltd コンピュータ
JPH11150451A (ja) * 1997-11-14 1999-06-02 Nec Corp 非同期リセット回路
AU4083599A (en) * 1998-05-18 1999-12-06 Leviton Manufacturing Company, Inc. Network based electrical control system with distributed sensing and control
JP2001142792A (ja) 1999-11-17 2001-05-25 Ricoh Co Ltd リセット信号発生回路
JP2002108510A (ja) 2000-09-28 2002-04-12 Toshiba Microelectronics Corp リセット回路
JP2002189706A (ja) * 2000-12-21 2002-07-05 Nec Miyagi Ltd 通信装置の分散型初期設定システム及び方法
JP4007027B2 (ja) * 2002-03-19 2007-11-14 日本電気株式会社 パワーオンリセット回路

Also Published As

Publication number Publication date
EP1619573B1 (en) 2014-01-08
US20060033541A1 (en) 2006-02-16
CN1781066A (zh) 2006-05-31
WO2004097608A1 (ja) 2004-11-11
EP1619573A4 (en) 2010-07-14
EP1619573A1 (en) 2006-01-25
US7239187B2 (en) 2007-07-03
CN1781066B (zh) 2010-05-26
JP4127283B2 (ja) 2008-07-30
JPWO2004097608A1 (ja) 2006-07-13

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20190425