HK1068436A1 - Pipeline architecture for maximum a posteriori (map) decoders - Google Patents

Pipeline architecture for maximum a posteriori (map) decoders

Info

Publication number
HK1068436A1
HK1068436A1 HK05100601A HK05100601A HK1068436A1 HK 1068436 A1 HK1068436 A1 HK 1068436A1 HK 05100601 A HK05100601 A HK 05100601A HK 05100601 A HK05100601 A HK 05100601A HK 1068436 A1 HK1068436 A1 HK 1068436A1
Authority
HK
Hong Kong
Prior art keywords
map
bit
posteriori
maximum
decoders
Prior art date
Application number
HK05100601A
Other languages
English (en)
Inventor
Edward L Hepler
Michael F Starsinic
Original Assignee
Interdigital Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interdigital Tech Corp filed Critical Interdigital Tech Corp
Publication of HK1068436A1 publication Critical patent/HK1068436A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N5/00—Computing arrangements using knowledge-based models
    • G06N5/04—Inference or reasoning models
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3972—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using sliding window techniques or parallel windows
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Artificial Intelligence (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Linguistics (AREA)
  • Software Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Compression Of Band Width Or Redundancy In Fax (AREA)
  • Image Processing (AREA)
  • Analogue/Digital Conversion (AREA)
HK05100601A 2001-09-06 2005-01-21 Pipeline architecture for maximum a posteriori (map) decoders HK1068436A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US31785501P 2001-09-06 2001-09-06
US10/037,609 US6961921B2 (en) 2001-09-06 2002-01-02 Pipeline architecture for maximum a posteriori (MAP) decoders
PCT/US2002/011664 WO2003023709A1 (fr) 2001-09-06 2002-04-15 Architecture pipeline pour decodeurs map

Publications (1)

Publication Number Publication Date
HK1068436A1 true HK1068436A1 (en) 2005-04-29

Family

ID=26714300

Family Applications (1)

Application Number Title Priority Date Filing Date
HK05100601A HK1068436A1 (en) 2001-09-06 2005-01-21 Pipeline architecture for maximum a posteriori (map) decoders

Country Status (15)

Country Link
US (4) US6961921B2 (fr)
EP (2) EP2159921A3 (fr)
JP (1) JP3935471B2 (fr)
KR (4) KR100887263B1 (fr)
CN (2) CN1941637B (fr)
AT (1) ATE438958T1 (fr)
BR (1) BR0212645A (fr)
CA (1) CA2459383A1 (fr)
DE (1) DE60233236D1 (fr)
HK (1) HK1068436A1 (fr)
MX (1) MXPA04002180A (fr)
MY (1) MY131249A (fr)
NO (1) NO20041357L (fr)
TW (2) TWI305701B (fr)
WO (1) WO2003023709A1 (fr)

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US7343530B2 (en) * 2004-02-10 2008-03-11 Samsung Electronics Co., Ltd. Turbo decoder and turbo interleaver
US7555070B1 (en) * 2004-04-02 2009-06-30 Maxtor Corporation Parallel maximum a posteriori detectors that generate soft decisions for a sampled data sequence
JP2006115145A (ja) * 2004-10-14 2006-04-27 Nec Electronics Corp 復号装置及び復号方法
KR101279283B1 (ko) * 2006-10-19 2013-06-26 조지아 테크 리서치 코오포레이션 블록 부호를 사용하는 통신 시스템에서 신호 송수신 장치및 방법
US8411709B1 (en) 2006-11-27 2013-04-02 Marvell International Ltd. Use of previously buffered state information to decode in an hybrid automatic repeat request (H-ARQ) transmission mode
JP2009060455A (ja) * 2007-08-31 2009-03-19 Nec Corp スライディングウィンドウターボ復号処理装置とその方法
US8897393B1 (en) 2007-10-16 2014-11-25 Marvell International Ltd. Protected codebook selection at receiver for transmit beamforming
US8291302B2 (en) * 2007-10-17 2012-10-16 Marvell International Ltd. State metrics memory reduction in a turbo decoder implementation
US8542725B1 (en) 2007-11-14 2013-09-24 Marvell International Ltd. Decision feedback equalization for signals having unequally distributed patterns
GB0804206D0 (en) * 2008-03-06 2008-04-16 Altera Corp Resource sharing in decoder architectures
US8565325B1 (en) 2008-03-18 2013-10-22 Marvell International Ltd. Wireless device communication in the 60GHz band
US8572470B2 (en) * 2008-03-28 2013-10-29 Nxp, B.V. Memory-efficient storage method: a fast BJCR based decoder implementation scheme
US8761261B1 (en) 2008-07-29 2014-06-24 Marvell International Ltd. Encoding using motion vectors
US8498342B1 (en) 2008-07-29 2013-07-30 Marvell International Ltd. Deblocking filtering
US8345533B1 (en) 2008-08-18 2013-01-01 Marvell International Ltd. Frame synchronization techniques
US8681893B1 (en) * 2008-10-08 2014-03-25 Marvell International Ltd. Generating pulses using a look-up table
JP5196567B2 (ja) * 2008-12-02 2013-05-15 日本電気株式会社 演算装置、復号化装置およびメモリ制御方法ならびにプログラム
US8578255B1 (en) 2008-12-19 2013-11-05 Altera Corporation Priming of metrics used by convolutional decoders
US8520771B1 (en) 2009-04-29 2013-08-27 Marvell International Ltd. WCDMA modulation
EP2302811B1 (fr) * 2009-08-18 2013-03-27 Telefonaktiebolaget L M Ericsson (Publ) Procédé d'algorithme Viterbi à sortie souple et décodeur
US8817771B1 (en) 2010-07-16 2014-08-26 Marvell International Ltd. Method and apparatus for detecting a boundary of a data frame in a communication network
US12012219B2 (en) * 2020-07-17 2024-06-18 The Boeing Company Aircraft buffet detection

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Also Published As

Publication number Publication date
TWI301704B (en) 2008-10-01
KR100887263B1 (ko) 2009-03-06
KR100905982B1 (ko) 2009-07-03
NO20041357L (no) 2004-04-01
BR0212645A (pt) 2004-08-24
WO2003023709A1 (fr) 2003-03-20
CN1284114C (zh) 2006-11-08
CN1554072A (zh) 2004-12-08
US20070118791A1 (en) 2007-05-24
KR20080003013A (ko) 2008-01-04
JP3935471B2 (ja) 2007-06-20
EP1423823B1 (fr) 2009-08-05
US20060005111A1 (en) 2006-01-05
KR100582051B1 (ko) 2006-05-22
TWI305701B (en) 2009-01-21
US20110271166A1 (en) 2011-11-03
US8316285B2 (en) 2012-11-20
JP2005503058A (ja) 2005-01-27
US7181670B2 (en) 2007-02-20
DE60233236D1 (de) 2009-09-17
US6961921B2 (en) 2005-11-01
EP2159921A3 (fr) 2011-11-16
CN1941637B (zh) 2010-05-12
EP1423823A4 (fr) 2006-03-22
ATE438958T1 (de) 2009-08-15
US7908545B2 (en) 2011-03-15
TW200423549A (en) 2004-11-01
MXPA04002180A (es) 2004-06-29
CA2459383A1 (fr) 2003-03-20
KR20050091792A (ko) 2005-09-15
KR20070064678A (ko) 2007-06-21
US20030066019A1 (en) 2003-04-03
MY131249A (en) 2007-07-31
CN1941637A (zh) 2007-04-04
KR20040034699A (ko) 2004-04-28
EP2159921A2 (fr) 2010-03-03
EP1423823A1 (fr) 2004-06-02

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20150415