HK1063230A1 - Memory system, buffering device and method operating a memory system - Google Patents

Memory system, buffering device and method operating a memory system

Info

Publication number
HK1063230A1
HK1063230A1 HK04105981A HK04105981A HK1063230A1 HK 1063230 A1 HK1063230 A1 HK 1063230A1 HK 04105981 A HK04105981 A HK 04105981A HK 04105981 A HK04105981 A HK 04105981A HK 1063230 A1 HK1063230 A1 HK 1063230A1
Authority
HK
Hong Kong
Prior art keywords
memory system
buffering device
method operating
operating
buffering
Prior art date
Application number
HK04105981A
Other languages
English (en)
Inventor
John Halbert
Michael Williams
Randy Bonella
James Dodd
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1063230A1 publication Critical patent/HK1063230A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol
HK04105981A 2000-09-18 2004-08-10 Memory system, buffering device and method operating a memory system HK1063230A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/664,982 US6530006B1 (en) 2000-09-18 2000-09-18 System and method for providing reliable transmission in a buffered memory system
PCT/US2001/028930 WO2002023352A2 (en) 2000-09-18 2001-09-14 System and method for providing reliable transmission in a buffered memory system

Publications (1)

Publication Number Publication Date
HK1063230A1 true HK1063230A1 (en) 2004-12-17

Family

ID=24668229

Family Applications (1)

Application Number Title Priority Date Filing Date
HK04105981A HK1063230A1 (en) 2000-09-18 2004-08-10 Memory system, buffering device and method operating a memory system

Country Status (8)

Country Link
US (1) US6530006B1 (ko)
KR (1) KR100625128B1 (ko)
CN (1) CN100412982C (ko)
AU (1) AU2001291006A1 (ko)
DE (1) DE10196641T1 (ko)
HK (1) HK1063230A1 (ko)
TW (1) TW542957B (ko)
WO (1) WO2002023352A2 (ko)

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US7389387B2 (en) * 2001-12-31 2008-06-17 Intel Corporation Distributed memory module cache writeback
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US7464225B2 (en) * 2005-09-26 2008-12-09 Rambus Inc. Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
US11328764B2 (en) 2005-09-26 2022-05-10 Rambus Inc. Memory system topologies including a memory die stack
US7593279B2 (en) * 2006-10-11 2009-09-22 Qualcomm Incorporated Concurrent status register read
US8143720B2 (en) * 2007-02-06 2012-03-27 Rambus Inc. Semiconductor module with micro-buffers
US7508723B2 (en) * 2007-05-24 2009-03-24 Entorian Technologies, Lp Buffered memory device
US9128632B2 (en) 2009-07-16 2015-09-08 Netlist, Inc. Memory module with distributed data buffers and method of operation
US9201817B2 (en) 2011-08-03 2015-12-01 Montage Technology (Shanghai) Co., Ltd. Method for allocating addresses to data buffers in distributed buffer chipset
CN102915279B (zh) * 2011-08-03 2015-05-13 澜起科技（上海）有限公司 分布式缓存芯片组中的数据缓存器的地址分配方法
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Also Published As

Publication number Publication date
DE10196641T1 (de) 2003-08-28
CN100412982C (zh) 2008-08-20
TW542957B (en) 2003-07-21
WO2002023352A3 (en) 2002-08-15
US6530006B1 (en) 2003-03-04
CN1475012A (zh) 2004-02-11
AU2001291006A1 (en) 2002-03-26
WO2002023352A2 (en) 2002-03-21
KR20030033070A (ko) 2003-04-26
KR100625128B1 (ko) 2006-09-20

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20150914