HK1047799B - 測試中的電路的測試樣式的連續應用和解壓 - Google Patents

測試中的電路的測試樣式的連續應用和解壓

Info

Publication number
HK1047799B
HK1047799B HK02107672.8A HK02107672A HK1047799B HK 1047799 B HK1047799 B HK 1047799B HK 02107672 A HK02107672 A HK 02107672A HK 1047799 B HK1047799 B HK 1047799B
Authority
HK
Hong Kong
Prior art keywords
test pattern
circuit
decompressed
test
bits
Prior art date
Application number
HK02107672.8A
Other languages
English (en)
Other versions
HK1047799A1 (en
Inventor
Janusz Rajski
Jerzy Tyszer
Mark Kassab
Nilanjan Mukherjee
Original Assignee
Mentor Graphics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from PCT/US2000/042211 external-priority patent/WO2001039254A2/en
Application filed by Mentor Graphics Corp filed Critical Mentor Graphics Corp
Publication of HK1047799A1 publication Critical patent/HK1047799A1/xx
Publication of HK1047799B publication Critical patent/HK1047799B/zh

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318544—Scanning methods, algorithms and patterns
    • G01R31/318547—Data generators or compressors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/31813—Test pattern generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318335—Test pattern compression or decompression
HK02107672.8A 1999-11-23 2002-10-23 測試中的電路的測試樣式的連續應用和解壓 HK1047799B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16713199P 1999-11-23 1999-11-23
US09/620,021 US7493540B1 (en) 1999-11-23 2000-07-20 Continuous application and decompression of test patterns to a circuit-under-test
PCT/US2000/042211 WO2001039254A2 (en) 1999-11-23 2000-11-15 Continuous application and decompression of test patterns to a circuit-under-test

Publications (2)

Publication Number Publication Date
HK1047799A1 HK1047799A1 (en) 2003-03-07
HK1047799B true HK1047799B (zh) 2010-08-27

Family

ID=40349421

Family Applications (1)

Application Number Title Priority Date Filing Date
HK02107672.8A HK1047799B (zh) 1999-11-23 2002-10-23 測試中的電路的測試樣式的連續應用和解壓

Country Status (5)

Country Link
US (1) US7493540B1 (zh)
EP (1) EP2128763B1 (zh)
AT (1) ATE445184T1 (zh)
DE (1) DE60043119D1 (zh)
HK (1) HK1047799B (zh)

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US9664739B2 (en) 1999-11-23 2017-05-30 Mentor Graphics Corporation Continuous application and decompression of test patterns and selective compaction of test responses
US6874109B1 (en) 1999-11-23 2005-03-29 Janusz Rajski Phase shifter with reduced linear dependency
US6684358B1 (en) * 1999-11-23 2004-01-27 Janusz Rajski Decompressor/PRPG for applying pseudo-random and deterministic test patterns
US9134370B2 (en) 1999-11-23 2015-09-15 Mentor Graphics Corporation Continuous application and decompression of test patterns and selective compaction of test responses
US8533547B2 (en) * 1999-11-23 2013-09-10 Mentor Graphics Corporation Continuous application and decompression of test patterns and selective compaction of test responses
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US6327687B1 (en) * 1999-11-23 2001-12-04 Janusz Rajski Test pattern compression for an integrated circuit test environment
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Also Published As

Publication number Publication date
HK1047799A1 (en) 2003-03-07
EP2128763B1 (en) 2014-01-08
DE60043119D1 (de) 2009-11-19
ATE445184T1 (de) 2009-10-15
EP2128763A1 (en) 2009-12-02
US7493540B1 (en) 2009-02-17

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Free format text: CORRECTION OF THE NAME OF THE INVENTOR FROM MUKHERJEE, NIIANJAN TO MUKHERJEE, NILANJAN

PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20131115