GB2308229A - Method for planarizing the surface of a wafer - Google Patents

Method for planarizing the surface of a wafer Download PDF

Info

Publication number
GB2308229A
GB2308229A GB9625363A GB9625363A GB2308229A GB 2308229 A GB2308229 A GB 2308229A GB 9625363 A GB9625363 A GB 9625363A GB 9625363 A GB9625363 A GB 9625363A GB 2308229 A GB2308229 A GB 2308229A
Authority
GB
United Kingdom
Prior art keywords
glass film
wafer
carried out
temperature
planarizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9625363A
Other languages
English (en)
Other versions
GB9625363D0 (en
Inventor
In-Ok Park
Yung-Seok Chung
Eui-Sik Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9625363D0 publication Critical patent/GB9625363D0/en
Publication of GB2308229A publication Critical patent/GB2308229A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
GB9625363A 1995-12-16 1996-12-05 Method for planarizing the surface of a wafer Withdrawn GB2308229A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950050997A KR100214073B1 (ko) 1995-12-16 1995-12-16 비피에스지막 형성방법

Publications (2)

Publication Number Publication Date
GB9625363D0 GB9625363D0 (en) 1997-01-22
GB2308229A true GB2308229A (en) 1997-06-18

Family

ID=19440781

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9625363A Withdrawn GB2308229A (en) 1995-12-16 1996-12-05 Method for planarizing the surface of a wafer

Country Status (6)

Country Link
JP (1) JP2859864B2 (de)
KR (1) KR100214073B1 (de)
CN (1) CN1159489A (de)
DE (1) DE19651778A1 (de)
GB (1) GB2308229A (de)
TW (1) TW308714B (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2994616B2 (ja) 1998-02-12 1999-12-27 キヤノン販売株式会社 下地表面改質方法及び半導体装置の製造方法
US6051849A (en) * 1998-02-27 2000-04-18 North Carolina State University Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer
US6608327B1 (en) 1998-02-27 2003-08-19 North Carolina State University Gallium nitride semiconductor structure including laterally offset patterned layers
US6265289B1 (en) 1998-06-10 2001-07-24 North Carolina State University Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby
US6177688B1 (en) 1998-11-24 2001-01-23 North Carolina State University Pendeoepitaxial gallium nitride semiconductor layers on silcon carbide substrates
US6255198B1 (en) 1998-11-24 2001-07-03 North Carolina State University Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby
US6521514B1 (en) 1999-11-17 2003-02-18 North Carolina State University Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates
US6380108B1 (en) 1999-12-21 2002-04-30 North Carolina State University Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts, and gallium nitride semiconductor structures fabricated thereby
US6403451B1 (en) 2000-02-09 2002-06-11 Noerh Carolina State University Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts
US6261929B1 (en) 2000-02-24 2001-07-17 North Carolina State University Methods of forming a plurality of semiconductor layers using spaced trench arrays
KR20120098095A (ko) * 2011-02-28 2012-09-05 에스케이하이닉스 주식회사 반도체장치 제조 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0519393A2 (de) * 1991-06-20 1992-12-23 Semiconductor Process Laboratory Co., Ltd. Verfahren zum Planarisieren einer Halbleitersubstratsoberfläche

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0519393A2 (de) * 1991-06-20 1992-12-23 Semiconductor Process Laboratory Co., Ltd. Verfahren zum Planarisieren einer Halbleitersubstratsoberfläche

Also Published As

Publication number Publication date
DE19651778A1 (de) 1997-06-19
JP2859864B2 (ja) 1999-02-24
CN1159489A (zh) 1997-09-17
GB9625363D0 (en) 1997-01-22
TW308714B (de) 1997-06-21
JPH09181071A (ja) 1997-07-11
KR100214073B1 (ko) 1999-08-02
KR970052884A (ko) 1997-07-29

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)