GB2308229A - Method for planarizing the surface of a wafer - Google Patents
Method for planarizing the surface of a wafer Download PDFInfo
- Publication number
- GB2308229A GB2308229A GB9625363A GB9625363A GB2308229A GB 2308229 A GB2308229 A GB 2308229A GB 9625363 A GB9625363 A GB 9625363A GB 9625363 A GB9625363 A GB 9625363A GB 2308229 A GB2308229 A GB 2308229A
- Authority
- GB
- United Kingdom
- Prior art keywords
- glass film
- wafer
- carried out
- temperature
- planarizing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims description 34
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 40
- 239000012535 impurity Substances 0.000 claims description 18
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 12
- 229910052796 boron Inorganic materials 0.000 claims description 12
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims description 11
- 239000011521 glass Substances 0.000 claims description 5
- 238000007669 thermal treatment Methods 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 4
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 2
- 239000013078 crystal Substances 0.000 description 12
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005334 plasma enhanced chemical vapour deposition Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950050997A KR100214073B1 (ko) | 1995-12-16 | 1995-12-16 | 비피에스지막 형성방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9625363D0 GB9625363D0 (en) | 1997-01-22 |
GB2308229A true GB2308229A (en) | 1997-06-18 |
Family
ID=19440781
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9625363A Withdrawn GB2308229A (en) | 1995-12-16 | 1996-12-05 | Method for planarizing the surface of a wafer |
Country Status (6)
Country | Link |
---|---|
JP (1) | JP2859864B2 (de) |
KR (1) | KR100214073B1 (de) |
CN (1) | CN1159489A (de) |
DE (1) | DE19651778A1 (de) |
GB (1) | GB2308229A (de) |
TW (1) | TW308714B (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2994616B2 (ja) | 1998-02-12 | 1999-12-27 | キヤノン販売株式会社 | 下地表面改質方法及び半導体装置の製造方法 |
US6051849A (en) * | 1998-02-27 | 2000-04-18 | North Carolina State University | Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer |
US6608327B1 (en) | 1998-02-27 | 2003-08-19 | North Carolina State University | Gallium nitride semiconductor structure including laterally offset patterned layers |
US6265289B1 (en) | 1998-06-10 | 2001-07-24 | North Carolina State University | Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby |
US6177688B1 (en) | 1998-11-24 | 2001-01-23 | North Carolina State University | Pendeoepitaxial gallium nitride semiconductor layers on silcon carbide substrates |
US6255198B1 (en) | 1998-11-24 | 2001-07-03 | North Carolina State University | Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby |
US6521514B1 (en) | 1999-11-17 | 2003-02-18 | North Carolina State University | Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates |
US6380108B1 (en) | 1999-12-21 | 2002-04-30 | North Carolina State University | Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts, and gallium nitride semiconductor structures fabricated thereby |
US6403451B1 (en) | 2000-02-09 | 2002-06-11 | Noerh Carolina State University | Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts |
US6261929B1 (en) | 2000-02-24 | 2001-07-17 | North Carolina State University | Methods of forming a plurality of semiconductor layers using spaced trench arrays |
KR20120098095A (ko) * | 2011-02-28 | 2012-09-05 | 에스케이하이닉스 주식회사 | 반도체장치 제조 방법 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0519393A2 (de) * | 1991-06-20 | 1992-12-23 | Semiconductor Process Laboratory Co., Ltd. | Verfahren zum Planarisieren einer Halbleitersubstratsoberfläche |
-
1995
- 1995-12-16 KR KR1019950050997A patent/KR100214073B1/ko not_active IP Right Cessation
-
1996
- 1996-11-16 TW TW085114063A patent/TW308714B/zh active
- 1996-12-05 GB GB9625363A patent/GB2308229A/en not_active Withdrawn
- 1996-12-12 DE DE19651778A patent/DE19651778A1/de not_active Withdrawn
- 1996-12-16 CN CN96121564A patent/CN1159489A/zh active Pending
- 1996-12-16 JP JP8336172A patent/JP2859864B2/ja not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0519393A2 (de) * | 1991-06-20 | 1992-12-23 | Semiconductor Process Laboratory Co., Ltd. | Verfahren zum Planarisieren einer Halbleitersubstratsoberfläche |
Also Published As
Publication number | Publication date |
---|---|
DE19651778A1 (de) | 1997-06-19 |
JP2859864B2 (ja) | 1999-02-24 |
CN1159489A (zh) | 1997-09-17 |
GB9625363D0 (en) | 1997-01-22 |
TW308714B (de) | 1997-06-21 |
JPH09181071A (ja) | 1997-07-11 |
KR100214073B1 (ko) | 1999-08-02 |
KR970052884A (ko) | 1997-07-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |