GB2244284A - A method of manufacturing a polycrystalline semiconductor film by ion implantation - Google Patents
A method of manufacturing a polycrystalline semiconductor film by ion implantation Download PDFInfo
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- GB2244284A GB2244284A GB9109508A GB9109508A GB2244284A GB 2244284 A GB2244284 A GB 2244284A GB 9109508 A GB9109508 A GB 9109508A GB 9109508 A GB9109508 A GB 9109508A GB 2244284 A GB2244284 A GB 2244284A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02592—Microstructure amorphous
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02691—Scanning of a beam
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Abstract
A method of manufacturing a polycrystalline semiconductor film includes a film formation step of forming an amorphous semiconductor film (2) containing crystalline phases (3) on a substrate (1), and a crystal growth step of performing ion implantation in the amorphous semiconductor film (2) with incident ions (Si) with a range larger than the thickness of the amorphous semiconductor film (2). The acceleration energy of the implanted ions is set so that the projected range of incident ions becomes larger than the film thickness of the semiconductor film. A polycrystalline semiconductor film (4) having large and uniform grain sizes can be formed at a low temperature (Figs. 1a, 1b). The ion may be a semiconductor constituting element to be crystallized, a substrate constituting element or a rare gas element. In the specific examples an amorphous silicon film containing crystal phases is deposited by CVD on a glass substrate and this is then implanted by silicon ions. Two or more types of ion may be implanted and reacted to form a transparent compound, e.g oxygen or nitrogen ions which react with silicon ions to form SiO2 or Si3N4. The semiconductor film (2) may also be formed by performing ion implantation on an amorphous semiconductor film on a substrate to partially form crystalline phases (crystal nucleation). Some of the crystalline phases contained in the amorphous film may be converted to amorphous phases. e.g. by irradiation with an ion beam; by forming an SiO2 film serving as a masking film and carrying out the ion implantation on the exposed portions of the amorphous semiconductor film not covered with the masking film under the conditions of forming amorphous phases; or by carrying out ion implantation in the entire film under the conditions not causing crystal growth. <IMAGE>
Description
- - 1 :2:2---1 -1:2 A Method of Manufacturing a Polyclystalline
Semiconductor Film The present invention relates to a method of manufacturing a polycrystalline semiconductor film, in which a semiconductor film having amorphous phases is crystallized and, more particularly, to a method of manufacturing a polycrystalline semiconductor film, in which crystalline phases are grown by using an ion beam to manufacture a polycrystalline semiconductor film having uniform and controlled grain sizes.
1 - 1 In relation to crystal growth using an ion beam, there is a conventional method of implanting arsenic ions to perform solid phase epitaxial crystallization for amorphous silicon formed on a silicon substrate (Jpn. j. Appl. Phys. 21 (1982) Suppl. 21-1, p. 211) or using a combination of ion implantation of xenon and substrate heating upon the ion implantation (Nuclear Instrum. Methods Res. Bl, 9/20 (1987) p. 457). In addition, in relation to a semiconductor film on a glass substrate and ion implantation, there is a method of implanting germanium or silicon ions with heating in a polycrystalline germanium or silicon film deposited on quartz glass to increase a grain size (Appl. Phys. 64 (1988) p. 2,337).
As compared with other methods, the above methods can execute solid phase crystallization at low - 2 temperatures and are therefore expected to be used to decrease the temperature of a semiconductor process or applied to a three-dimensional integrated circuit.
In each of the above conventional crystal growth methodsusing an ion beam, however, since the projected range of incident ions is set at the center of a film, the defect density in crystalline phases is high. Therefore, the substrate temperature of ion implantation must be set high to grow grains. In the case of a polycrystalline silicon film, for example, a substrate must be heated up to at least 800C during implantation. If a material which cannot withstand this temperature is used as the substrate of a semiconductor film, a serious problem of deformation in substrate shape or diffusion of a substrate constituting element into the semiconductor film arises.
On the other hand, in a well-known method of performing a heat treatment to form crystalline phases in solid phase, a temperature of at least 600C is required in the case of, e.g., an amorphous silicon film.
OBJECTS AND SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of manufacturing a polycrystalline semiconductor film, whici can realize lowtemperature formation of a polycrystalline semiconductor film 1 r 1 having large and uniform grain sizes not possible in conventional methods.
It is another object of the present invention to provide a method of manufacturing a polycrystalline semiconductor film, which enables the use of a substrate unusable as a semiconductor substrate in a conventional high-temperature process performed by heating due to deformation caused by heat or diffusion of a substrate constituting element.
A method of manufacturing a polycrystalline semiconductor film according to the present invention comprises the film formation step of forming an amorphous semiconductor film containing crystalline phases on a substrate and the crystal growth step of performing ion implantation in the amorphous semiconductor film such that the projected range of incident ions becomes larger than the film thickness of the amorphous semiconductor film.
The above, and other, objects, features and advantages of the present invention, will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.
The formation of an amorphous semiconductor film containing crystalline phases on a substrate according to the present-invention can be realized by forming a semiconductor film containing crystalline - 4 i phases on a substrate by, e.g., a plasma CVD method or a thermal CVD method, or by forming an amorphous semiconductor film on a substrate and subsequently performing ion implantation in the amorphous semiconductor film to partially form crystalline phases (crystal nucleation).
In order to partially form crystalline phases by ion implantation, the acceleration energy of ions to be implanted is set such that the projected range of incident ions becomes larger than the film thickness of a semiconductor film. As a result, since the effect of forming amorphous phases derived from a cascade collision between incident ions and constituting atoms of a semiconductor film is weakened, the defect density in a region crystallized in the semiconductor film is decreased to realize good crystalline phases. If the acceleration energy is smaller than the film thickness, although the formation density of crystalline phases is increased in a region with a higher energy deposition, the crystallinity of crystalline phases is degraded. In addition, no crystalline phase is formed in the semiconductor film at a depth where no ions can reach. The power flux density of the ion beam is preferably 1'W/CM2 or more. If the power flux density is less than I W/cm2, crystalline phases may be formed by performing ion implantation while the substrate is heated up to 500C to 8000C. The boundary value of power flux density at which this substrate heating is required (a power f lux density at which the formation rate of crystalline phases largely changes) largely changes in accordance with a type of semiconductor film, substrate, or ion. Although a type of ion to be used is not particularly limited, it is preferably a semiconductor constituting element to be crystallized, a substrate constituting element, or a rare gas element. Even under the above preferable condition of the ion beam current density for the formation of crystalline phases, the growth of crystalline phases can be performed subsequently to the formation thereof. However, since the growth rate is high, a difference between the grain sizes obtained by crystalline phases initially formed and those formed at the end is increased.
To weaken the effect of forming amorphous phases by a cascade collision between incident ions and constituting atoms of a semiconductor film and to decrease the defect density in a region crystallized in the semiconductor film, the acceleration energy of the incident ions in the crystal growth step of the present invention is set such that the projected range of incident ions becomes larger than the film thickness of the semiconductor film. When the projected range of ncident ions is smaller than the film thickness of the semiconductor film, a portion where no ions can reach - 6 f is formed in the semiconductor film, and the growth of crystalline phases occurs less easily in the portion.
The power flux-density of incident ions is preferably 0.5 to 1 W/CM2. If the power flux density exceeds 1 W/cm 2, the formation of crystalline phases occurs to degrade the controllability of a grain size.
The boundary value of power flux density at which heating of the substrate is necessary changes in accordance with a type of semiconductor film or substrate. For example, when a semiconductor film is a silicon film, the substrate need not be heated if the temperature of the silicon film is increased to be 220C or more by the heating effect of incident ions. Since the growth of amorphous phases occurs more easily than that of crystalline phases if the temperature is less than 2201C, the substrate must be heated up to 2201C or more by an external heater.
If the power flux density is 0.5 W/CM2 or more, the crystal growth can be performed while the substrate is not particularly heated. If the power flux density is less than 0.5, the growth rate of crystalline phases can be increased by heating the substrate up to 500C to 8000C during ion implantation.
Although the type of ion to be implanted is not particularly limited, the ion is preferably a semiconductor constituting element to be crystallized, 1 a substrate constituting element, or a rare gas element.
In the present invention, a control step is preferably provided between the film formation step and the crystal growth step. In this control step, some of crystalline phases contained in a semiconductor film are phanged to amorphous phases to control the density of crystals and-their spatial arrangement in the film prior to the subsequent crystal gxowth siep. As a result, a polycrystalline semiconductor film having larger and more uniform grain sizes can be formed. The following three methods can be, preferably-used as.--a.method of controlling the density of crystals in this control step.
That is, in the first method, scanning is performed under the conditions of forming amorphous phases to radiate a focused ion beam with a predetermined diameter onto a semiconductor film containing crystalline phases. In this method, only crystalline phases present in regions-on which the focused ion beam is radiated are changed to amorphous phases, and crystalline phases in non-ion-radiated portions remain in a semiconductor film. The conditions of the focused ion beam such as an acceleration voltage, an ion current density, and a radiation amount are set in accordance with, e.g., the.size and density of crystals contained in an amorphous semiconductor film such that a polycrystalline film k with larger and more uniform grain sizes is formed in the subsequent crystal growth step.
In the second method, a predetermined size of an Si02 film, for example, capable of serving as a masking film against to-be-implanted ions is coated on an amorphous semiconductor film, and ion implantation is executed in exposed portions of the amorphous semiconductor film not covered with the masking film under the conditions of forming amorphous phases. The ion implantation may be performed while the amorphous semiconductor film is heated.
In the third method, ion implantation is performed in an entire film under the conditions not causing crystal growth, i.e., causing growth of amorphous phases (i.e., the substrate temperature of a semiconductor film of 2200C or less) such that crystals having comparatively small sizes in an initial state are changed to amorphous phases and-only crystals having comparatively large sizes in the initial state remain after'the ion implantati6n, thereby controlling the density of crystal phases.
In addition, when light absorption occurs due to incident ions reaching the substrate, two or more types of ions are implanted and reacted (e.g., if the ight absorption occurs due to silicon ion implantation, oxygen and nitrogen ions are implanted) to f orm a transparent compound (Si02 or Si3N4 in the 0 above example) in the substrate, thereby suppressing the light absorption.
According to the present invention, during a process in which accelerated ions are implanted in a semiconductor film and decelerated while losing energy, an energy is given directly (an elastic collision between incident atoms and semiconductor atoms) or indirectly (a nonelastic collision between incident atoms and semiconductor atoms) to a target atoms, thereby locally heating, at the atomic level, the semiconductor film up to a high temperature. Since this temperature-rise caused by an on beam is short in time and local, an average substrate temperature rise is much smaller than this temperature rise. In addition, defects caused by ion implantation activate the movement of semiconductor atoms, and the crystal growth of a semiconductor film at a low temperature is realized.
Furthermore, since the acceleration energy is determined such that the projected range of incident ions becomes larger than the film thickness of a semiconductor film in the formation or growth of crystal phases, the effect of forming amorphous phases by a cascade collision between incident ions and.semiconductor film constituting atoms is suppressed, and a defect density in.a region crystallized in the 1 semiconductor film is decreased. As a result, high-quality grains can be obtained at a low temperature.
BRIEF DESCRIPTION OF THE DRAWINGS
Figs. 1 to 3 are sectional views for explaining manufacturing steps in Examples 1 to 3 according to the present invention; and Figs. 4 and 5 are graphs showing concentration distributions of incident ions in Exampl 1.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS Example 1
An amorphous silicon film containing crystal phases was deposited to have a film thickness of 150 nm on each of two types of glass substrates consisting of quartz glass and alkaline earth-alumina borosilicate glass by a plasma CVD method using silane gas as a source gas (Fig. l(a)). Subsequently, silicon ions were implanted at an acceleration energy of 180 keV, a dose of 5 x 1016 ions/cm 2 and a beam current density of 6 Wcm 2 without heating each substrate (Fig. '1(b)). Fig. 4 shows the results obtained by calculating the distribution of incident silicon ions (in accordance with an LSS theory). These samples were compared with.each other by transmission electron microscopic observation and transmission electron beam diffraction 11 - f before and after the ion implantation. It was confirmed that the amorphous silicon film containing crystalline phases of about 50 nm before the ion implantation was grown to be a polycrystalline silicon film having crystal grains of about 600 nm. -When the current density of an ion beam was changed, it was found that the growth rate of crystal grains was extremely decreased at a current density of 3 gA/cm2 or less. In addition, the grain size of the final grains was determined by the density of crystal phases and was not increased as the dose was increased. Therefore, the crystal growth was finished when the entire area of the amorphous silicon layer was changed to polycrystals. On the other hand, when the ion implantation was performed by decreasing the current density of an ion beam to be 2 Lk/CM2 and heating the substrate up to about 300C, a polycrystalline silicon film with a grain size similar to that obtained when no substrate heating was performed was formed on either glass substrate.
Subsequently, to oxidize the silicon ions implanted in each substrate, oxygen ions were implanted at an acceleration energy of 110 keV and a dose of 1 x 10 17 ions /CM2 (Fig. l(c)). The implantation depth of the oxygen ions was set to coincide with that of the silicon ions, and the implantation amount of the oxygen ions was set to be twice'that of the silicon ions. Fig. 5 shows the concentration distribution of oxygen 12 calculated in accordance with the above conditions. Thereafter, a pattern was formed in the polycrystalline silicon film, and light absorption in a portion etched by the silicon ions was checked. As a result, a significant effect of suppressing light absorption was found as compared with the case in which no oxygen ion implantation was performed.
It should be noted that when a phase rich in silicon is formed on a substrate, colouring (absorption of visible light) of the substrate occurs due to a dicontinuity in the stoichiometric ratio. Such colouring is indicated by a region 5 (Fig. lb) of the substrate 1 where there is a high concentration of incident silicon ions. The implantation of oxygen ions as described with reference to Fig. lc is carried out to deal with this problem. The silicon ions implanted in the substrate are oxydised to maintain transparency of the substrate. For example, when a TFT (thin film transistor) is formed on glass, loss of light by colouring can be prevented by this technique in those portions of the substrate which are to serve as pixels. Example 2 An amorphous silicon film containing crystal phases was deposited to have a film thickness of 150 nm on each of the same two types of glass substrates as in Example 1 by a plasma CVD method. A 200 nm thick silicon oxide film was deposited on the resultant structure by a sputtering method and subjected to a photolithographic step to form 500 nm side square masks with intervals of 3 pm therebetween (Fig. 2(a)). Subsequently, silicon ions were implanted at an acceleration energy of 100 keV, a dose of I x 1011 ions/cm' and a beam current density of 1 pA/CM2 Without heating such substrate to form amorphous phases in non- masked portions (Fig. 2(b)). Thereafter, the silicon oxide film was removed, and silicon ions were further implanted at an acceleration energy of 180 keV, a dose of 5 x 1016 ions /CM2, a beam current density of 2 pA/cm2 and a substrate temperature of 3000C (Fig. 2(c)). These samples were evaluated by transmission electron microscopic observation and transmission electron beam - 13 diffraction. As a result, it was found that a polycrystalline silicon film having comparatively uniform grain sizes of about 3 m was formed on either glass substrate. Example 3 An amorphous silicon film was deposited to have a film thickness of 150 nm on each of the same two types of glass substrates as in Example 1 by a plasma CVD method (Fig. 3(a)). Subsequently, silicon ions were implanted at an acceleration energy of 180 keV, a dose of 3 x 10 16 ions/cm' and a beam current density of 10 gA/cm 2 without heating each substrate to form crystalline phases (crystal nucleation) (Fig. 3(b)). Thereafter, in order to reduce a derisity of the crystalline phases,--silicon ions were implanted at an acceleration energy of 180 keV, a dose of 1 X 1 016 ions /CM2, a current beam density of 1 4A/cm 2 and a substrate temperature of 200C to change crystalline phases having small grain sizes to amorphous phases (Fig. 3(c)). Thereafter, to grow the remaining crystal phases to crystallize the entire film, silicon ions were implanted at an acceleration energy of 180 keV, a dose of 5 x 10 16 ions /CM2, a beam current density of 2 gA/cm2 and a substrate temperature of 3000C (Fig. 3(d)). When these samples were.evaluated by transmission electron microscopic observation and transmission electron beam diffraction, it was confirmed that a polycrystalline silicon film having a grain size of about 3 pm was formed. On the other hand, the sample formed as shown in Fig. 3(c) was subjected to a heat treatment in a nitrogen atmosphere at 600'C for five hours, and the same evaluation was performed. As a result, it was found that a polycrystalline silicon film having a grain size of about 3 pm was formed on either substrate. Note that the crystal growth caused by the heat treatment was able to be performed by a laser or a lamp. It should be noted that the acceleration energies of the silicon ions are such that the silicon ions can penetrate the silicon film. With regard to the range of the silicon ions, generally, the experimental results are consistent with the results obtained by calculating the distribution of incident silicon ions in accordance with an LSS theory. As described in example 1, visible light absorption in a portion irradiated by silicon ions is checked to determine whether the ions reach the substrate. According to the present invention, formation of a polycrystalline semiconductor film having large and uniform grain sizes not possible in conventional methods can be realized at a low temperature. In addition, a substrate unusable as a semiconductor substrate in a conventional high-temperature process performed by heating due to deformation caused by heat or diffusion of a substrate constituting element can be used in the present invention. 1... Glass substrate 2... Amorphous silicon film 3... Crystalline phases 4... Polycrystalline film 5... Colored region 6... SiO2 mask
Claims (4)
1. A method of manufacturing a polycrystalline semiconductor film, comprising:
the film formation step of forming an amorphous semiconductor film containing crystalline phases; and the crystal growth step of performing ion implantation in said amorphous semiconductor film such that a projected range of incident ions becomes larger than a film thickness of said amorphous semiconductor film.
2. A method according to claim 1, further comprising, prior to said crystal growth step, the control step of changing some of said crystalline phases contained in said amorphous semiconductor film to amorphous phases.
3. A method according to claim 2, wherein said control step is executed by radiating a focused ion beam onto said amorphous semiconductor film at spacial intervals along the said amorphous semiconductor film.
4. A method according to claim 2, wherein said control step is executed by masking said amorphous semiconductor film into a predetermined shape and implanting ions into a non-masked portion.
Published 1991 at The Patent Office, Concept House, Cardiff Road. NewporL Gwent NP9 I RH. Further copies may be obtained from Sales Branch, Unit 6. Nine Mile Point. Cwnifelinfach, Cross Keys, Newport. NPI 7HZ- Printed by Multiplex techniques ltd. St Mary Cray, Kent.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11657290A JP2800060B2 (en) | 1989-11-14 | 1990-05-02 | Method for manufacturing semiconductor film |
Publications (3)
Publication Number | Publication Date |
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GB9109508D0 GB9109508D0 (en) | 1991-06-26 |
GB2244284A true GB2244284A (en) | 1991-11-27 |
GB2244284B GB2244284B (en) | 1993-11-03 |
Family
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Family Applications (1)
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GB9109508A Expired - Fee Related GB2244284B (en) | 1990-05-02 | 1991-05-02 | A method of manufacturing a polycrystalline semiconductor film |
Country Status (4)
Country | Link |
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DE (1) | DE4114162A1 (en) |
FR (1) | FR2661779A1 (en) |
GB (1) | GB2244284B (en) |
IT (1) | IT1248789B (en) |
Citations (10)
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GB1258259A (en) * | 1968-04-05 | 1971-12-30 | ||
GB1349046A (en) * | 1971-04-19 | 1974-03-27 | Western Electric Co | Method of producing a stable tantalum-aluminum thin film |
EP0103767A2 (en) * | 1982-08-23 | 1984-03-28 | Kabushiki Kaisha Toshiba | Method of producing a semiconductor device by ion-implantation and device produced by the method |
GB2137806A (en) * | 1983-04-05 | 1984-10-10 | Standard Telephones Cables Ltd | Ion implantation in semiconductor bodies |
US4509990A (en) * | 1982-11-15 | 1985-04-09 | Hughes Aircraft Company | Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates |
JPS61174621A (en) * | 1985-01-28 | 1986-08-06 | Nippon Telegr & Teleph Corp <Ntt> | Manufacture of semiconductor thin crystal |
EP0271232A1 (en) * | 1986-11-24 | 1988-06-15 | AT&T Corp. | Method of making an article comprising a heteroepitaxial structure |
GB2207809A (en) * | 1987-07-31 | 1989-02-08 | Samsung Semiconductor Tele | Method of manufacturing high resistance polycrystalline silicon |
EP0308166A2 (en) * | 1987-09-18 | 1989-03-22 | Xerox Corporation | Polycrystalline film formation |
GB2215516A (en) * | 1988-02-29 | 1989-09-20 | Mitsubishi Electric Corp | A method of producing a compound semiconductor device |
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JPS5837913A (en) * | 1981-08-28 | 1983-03-05 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS6037721A (en) * | 1983-08-10 | 1985-02-27 | Seiko Epson Corp | Quantum annealing method |
JPS60143624A (en) * | 1983-12-29 | 1985-07-29 | Fujitsu Ltd | Manufacture of semiconductor device |
JPS60164316A (en) * | 1984-02-06 | 1985-08-27 | Sony Corp | Formation of semiconductor thin film |
JPH0722121B2 (en) * | 1984-09-25 | 1995-03-08 | ソニー株式会社 | Semiconductor manufacturing method |
DE69031880T2 (en) * | 1989-03-31 | 1998-05-20 | Canon Kk | Process for the production of a semiconducting crystalline film |
-
1991
- 1991-04-30 IT ITMI911181A patent/IT1248789B/en active IP Right Grant
- 1991-04-30 DE DE4114162A patent/DE4114162A1/en not_active Withdrawn
- 1991-05-02 FR FR9105415A patent/FR2661779A1/en not_active Withdrawn
- 1991-05-02 GB GB9109508A patent/GB2244284B/en not_active Expired - Fee Related
Patent Citations (10)
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GB1258259A (en) * | 1968-04-05 | 1971-12-30 | ||
GB1349046A (en) * | 1971-04-19 | 1974-03-27 | Western Electric Co | Method of producing a stable tantalum-aluminum thin film |
EP0103767A2 (en) * | 1982-08-23 | 1984-03-28 | Kabushiki Kaisha Toshiba | Method of producing a semiconductor device by ion-implantation and device produced by the method |
US4509990A (en) * | 1982-11-15 | 1985-04-09 | Hughes Aircraft Company | Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates |
GB2137806A (en) * | 1983-04-05 | 1984-10-10 | Standard Telephones Cables Ltd | Ion implantation in semiconductor bodies |
JPS61174621A (en) * | 1985-01-28 | 1986-08-06 | Nippon Telegr & Teleph Corp <Ntt> | Manufacture of semiconductor thin crystal |
EP0271232A1 (en) * | 1986-11-24 | 1988-06-15 | AT&T Corp. | Method of making an article comprising a heteroepitaxial structure |
GB2207809A (en) * | 1987-07-31 | 1989-02-08 | Samsung Semiconductor Tele | Method of manufacturing high resistance polycrystalline silicon |
EP0308166A2 (en) * | 1987-09-18 | 1989-03-22 | Xerox Corporation | Polycrystalline film formation |
GB2215516A (en) * | 1988-02-29 | 1989-09-20 | Mitsubishi Electric Corp | A method of producing a compound semiconductor device |
Non-Patent Citations (1)
Title |
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Patent Abstracts of Japan, vol 10, no.384, (E-466) (2441) & JP 61174621 A * |
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Publication number | Publication date |
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IT1248789B (en) | 1995-01-30 |
ITMI911181A0 (en) | 1991-04-30 |
FR2661779A1 (en) | 1991-11-08 |
DE4114162A1 (en) | 1991-11-07 |
GB9109508D0 (en) | 1991-06-26 |
GB2244284B (en) | 1993-11-03 |
ITMI911181A1 (en) | 1992-10-30 |
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