JPS63196032A - Crystallization of semiconductor thin film - Google Patents
Crystallization of semiconductor thin filmInfo
- Publication number
- JPS63196032A JPS63196032A JP2935687A JP2935687A JPS63196032A JP S63196032 A JPS63196032 A JP S63196032A JP 2935687 A JP2935687 A JP 2935687A JP 2935687 A JP2935687 A JP 2935687A JP S63196032 A JPS63196032 A JP S63196032A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- semiconductor thin
- amorphous
- annealing
- crystallized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 43
- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 238000002425 crystallisation Methods 0.000 title claims description 4
- 230000008025 crystallization Effects 0.000 title description 2
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000013078 crystal Substances 0.000 abstract description 27
- 238000000034 method Methods 0.000 abstract description 18
- 238000000137 annealing Methods 0.000 abstract description 15
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 12
- 239000010408 film Substances 0.000 abstract description 7
- 238000001953 recrystallisation Methods 0.000 abstract description 4
- 239000010453 quartz Substances 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 239000007790 solid phase Substances 0.000 description 7
- 238000002834 transmittance Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- -1 silicon ions Chemical class 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、固相成長法を使用した半導体薄膜の結晶化方
法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for crystallizing a semiconductor thin film using solid phase growth.
本発明は、固相成長法を使用した単結晶薄膜の形成方法
であり、部分的に結晶化した非晶質半導体薄膜の上にマ
スク層を選択的に形成し、再度非晶質化した後、改めて
結晶化させることにより、粒径の大きな単結晶薄膜から
れるようにしたものである。The present invention is a method for forming a single crystal thin film using a solid phase growth method, in which a mask layer is selectively formed on a partially crystallized amorphous semiconductor thin film, and after the film is made amorphous again. By crystallizing it again, a single crystal thin film with a large grain size can be obtained.
従来、石英のような絶縁゛性基板上にCVD (化学
気相成長)法により多結晶(ポリ)Si層を形成し、シ
リコンSt”のイオン注入を行って非晶質(アモルファ
ス)化した後、アニールによって固相エピタキシャル成
長させて単結晶Si薄膜を得る方法(固相成長法)が提
案されている。Conventionally, a polycrystalline (poly)Si layer is formed on an insulating substrate such as quartz by the CVD (chemical vapor deposition) method, and then made into an amorphous state by implanting silicon St'' ions. , a method (solid phase growth method) has been proposed in which a single crystal Si thin film is obtained by solid phase epitaxial growth using annealing.
上述した従来の固相成長法によれば、アニール後5ii
l膜の一部分に結晶化が生じても、その周囲においても
結晶核が不規則に多数発生するため、粒径の大きな単結
晶Sir!膜が得られないという問題点があった。According to the conventional solid phase growth method described above, after annealing 5ii
Even if crystallization occurs in a part of the film, a large number of crystal nuclei will occur irregularly in the surrounding area, so single crystal Sir! There was a problem that a film could not be obtained.
本発明は、上述の点に鑑みて粒径の大きな単結晶半導体
薄膜が得られる結晶化方法を提供するものである。In view of the above-mentioned points, the present invention provides a crystallization method capable of obtaining a single crystal semiconductor thin film having a large grain size.
本発明に係る半導体薄膜の結晶化方法においては、絶縁
性基板(11上に非晶質化した半導体重@ (31を形
成する工程と、この非晶質化した半導体薄膜(3)の少
なくとも一部をアニールによって結晶化する工程と、半
導体薄膜の部分的に結晶化した領域、即ち結晶核(4)
上に選択的にマスク層となるホトレジスト層(5)を形
成する工程と、このマスク層(5)で覆われていない部
分の半導体重lI! !31を再度非晶質化する工程と
、半導体薄膜(3)を改めてアニールによって結晶化す
る工程を存する。The method for crystallizing a semiconductor thin film according to the present invention includes a step of forming an amorphous semiconductor layer (31) on an insulating substrate (11), and at least one of the steps of forming an amorphous semiconductor layer (31) on an insulating substrate (11). The process of crystallizing the partially crystallized region by annealing, and the partially crystallized region of the semiconductor thin film, that is, the crystal nucleus (4)
A step of selectively forming a photoresist layer (5) as a mask layer on top, and a semiconductor layer (1I!) in the portion not covered with this mask layer (5). ! There are two steps: a step of making the semiconductor thin film (3) amorphous again, and a step of crystallizing the semiconductor thin film (3) again by annealing.
非晶質化した半導体薄膜(3)は、絶縁性基板+11上
に多結晶半導体薄膜(2)を形成した後、適当なイオン
注入を行って非晶質化することにより形成しても良く、
又は!1!1&i性基板11)上に直接非晶質の半導体
薄膜(3)を形成しても良い、また、結晶核(4)上に
選択的に形成するマスク層は、基板として石英基板(1
)を使用し、結晶核(4)を形成した後、半導体薄膜(
3)上にネガ型ホトレジスト層(5)を形成し、そして
石英基板tl)の裏面側から露光し、現像することによ
り形成することができる。The amorphous semiconductor thin film (3) may be formed by forming a polycrystalline semiconductor thin film (2) on the insulating substrate +11 and then performing appropriate ion implantation to make it amorphous.
Or! The amorphous semiconductor thin film (3) may be formed directly on the quartz substrate (11) as a substrate, and the mask layer selectively formed on the crystal nucleus (4) may be
) to form a crystal nucleus (4), then a semiconductor thin film (
3) It can be formed by forming a negative photoresist layer (5) thereon, exposing it to light from the back side of the quartz substrate (tl), and developing it.
本発明によれば、先ず非晶質半導体薄膜(3)に部分的
に結晶核(4)が生じた時点でアニールを中断し、次に
結晶核(4)上に形成したホトレジスト層(5)をマス
クにしてその他の領域を最初の非晶質状態に戻し、この
後改めてアニールを施すため、既に生じている結晶核(
4)から優先的に再結晶化が進行し、従来の方法では得
られない大きさを有する単結晶半導体薄膜(7)が得ら
れる。According to the present invention, annealing is first interrupted when crystal nuclei (4) are partially formed in the amorphous semiconductor thin film (3), and then the photoresist layer (5) formed on the crystal nuclei (4) is is used as a mask to return the other regions to the initial amorphous state, and then annealing is performed again.
Recrystallization proceeds preferentially from 4), and a single crystal semiconductor thin film (7) having a size that cannot be obtained by conventional methods is obtained.
図面を参照して本発明の詳細な説明する。 The present invention will be described in detail with reference to the drawings.
先ず第1図Aに示すように、石英基板+11上にCvD
により厚さ約800人の多結晶(ポリ)Si ii膜(
2)を形成した後、シリコンSt”のイオン注入(例え
ば2 Xl0IS/cm”、40keV)を行って非晶
質(アモルファス)化させる。又は、プラズマCVDに
より、石英基板11)上に直接非晶質Si薄膜を形成し
ても良い。First, as shown in FIG. 1A, CvD is deposited on a quartz substrate +11.
A polycrystalline (poly)Si II film with a thickness of about 800
2), silicon St'' is ion-implanted (for example, 2 Xl0IS/cm'', 40 keV) to make it amorphous. Alternatively, an amorphous Si thin film may be formed directly on the quartz substrate 11) by plasma CVD.
次に第1図Bに示すように、石英基板(1)を炉の中に
配置してアニールを施す、そして、非晶質Si薄膜(3
)に分散して一部結晶化した領域、即ち結晶核(4)が
生じる条件、例えば600℃、5時間の条件でアニール
を中断する。Next, as shown in FIG. 1B, the quartz substrate (1) is placed in a furnace and annealed, and the amorphous Si thin film (3
), the annealing is interrupted under conditions that produce partially crystallized regions, ie, crystal nuclei (4), for example, at 600° C. for 5 hours.
次に第1図Cに示すように、S i 71119 (3
1の全面にネガ型のホトレジスト層(5)を形成した後
、石英基板[11の裏面側からg線(436nm)(6
1を照射する。この照射の際、第2図に示すように非晶
質状態のSi薄膜の透過率(同図の曲線A参照)が掻く
僅かであるのに対して、結晶核(4)が生じた部分のS
i薄膜の透過率(同図の曲線B参照)が比較的良好であ
るため、g線(6)は結晶核(4)を透過して結晶核(
4)上のホトレジスト層(5)のみを露光することがで
きる。Next, as shown in FIG. 1C, S i 71119 (3
After forming a negative photoresist layer (5) on the entire surface of the quartz substrate [11], a g-line (436 nm) (6
Irradiate 1. During this irradiation, as shown in Figure 2, the transmittance of the Si thin film in the amorphous state (see curve A in the same figure) is very small, but the transmittance of the part where the crystal nuclei (4) are generated is S
Since the transmittance of the i-thin film (see curve B in the same figure) is relatively good, the g-line (6) passes through the crystal nucleus (4) and passes through the crystal nucleus (
4) Only the top photoresist layer (5) can be exposed.
次に第1図りに示すように、現像処理を施して結晶核(
4)上にホトレジスト層(5)を選択的に形成する。Next, as shown in the first diagram, a development process is performed to form crystal nuclei (
4) Selectively form a photoresist layer (5) on top.
次に第1図Eに示すように、ホトレジスト層(5)が結
晶核(4)上に形成された石英基板(1)に対して、再
びシリコンSi”をイオン注入(例えば、2×10”/
cm”、40keV)する、このイオン注入の際、結晶
核(4)上のホトレジスト層(5)がマスクとなって、
ホトレジスト層(5)で覆われていない部分のSi薄膜
を選択的に非晶質化させることができる。即ち、この工
程により、上記第1図Bのアニール工程で再結晶化まで
には至っていないが、完全な非晶質状態ではなくなって
いる部分のSi薄膜が最初の非晶質状態に戻る。Next, as shown in FIG. 1E, silicon ions (for example, 2 /
cm", 40 keV). During this ion implantation, the photoresist layer (5) on the crystal nucleus (4) serves as a mask,
The portions of the Si thin film not covered with the photoresist layer (5) can be selectively made amorphous. That is, through this step, the portions of the Si thin film that have not been recrystallized in the annealing step shown in FIG. 1B but are no longer in a completely amorphous state return to the initial amorphous state.
次に第1図Fに示すように、ホトレジスト層(5)を除
去した後、石英基板(1)を炉内に配置して改めて約6
00℃で固相アニールを施す、この固相アニールの際、
元の非晶質状態に戻ったSi薄膜(3)に再結晶化のた
めの結晶核が新たに生じる間に、最初のアニールで生じ
た結晶核(4)からの再結晶化が優先的に進行するため
、粒径の大きな単結晶Tll膜(7)が得られる。Next, as shown in FIG. 1F, after removing the photoresist layer (5), the quartz substrate (1) is placed in the furnace and the
During this solid phase annealing, solid phase annealing is performed at 00°C.
While crystal nuclei for recrystallization are newly generated in the Si thin film (3) which has returned to its original amorphous state, recrystallization from the crystal nuclei (4) generated in the first annealing is preferentially performed. As the process progresses, a single crystal Tll film (7) with a large grain size is obtained.
本発明により、従来法では得られない大きな粒径を有す
る単結晶半導体薄膜を得ることが可能になる。According to the present invention, it is possible to obtain a single crystal semiconductor thin film having a large grain size that cannot be obtained by conventional methods.
第1図A−Fは実施例の′工程図、第2図は非晶質状態
及び結晶化状態にあるSi3膜の波長に対する透過率を
測定したグラフである。
+1)は石英基板、セ)はポリSi薄膜、(3)は非晶
質Sj薄膜、(4)は結晶核、(5)はホトレジスト層
、(6)はg線、(刀は単結晶薄膜である。1A to 1F are process diagrams of the example, and FIG. 2 is a graph showing the measured transmittance of the Si3 film in an amorphous state and a crystallized state with respect to wavelength. +1) is a quartz substrate, c) is a poly-Si thin film, (3) is an amorphous SJ thin film, (4) is a crystal nucleus, (5) is a photoresist layer, (6) is a g-line, (sword is a single crystal thin film It is.
Claims (1)
と、 上記非晶質化した半導体薄膜の少なくとも一部を結晶化
する工程と、 上記半導体薄膜の結晶化した領域上に選択的にマスク層
を形成する工程と、 上記マスク層で覆われていない部分の上記半導体薄膜を
再度非晶質化する工程と、 上記半導体薄膜を結晶化する工程 を有する半導体薄膜の結晶化方法。[Claims] A step of forming an amorphous semiconductor thin film on an insulating substrate; a step of crystallizing at least a portion of the amorphous semiconductor thin film; and a step of crystallizing the semiconductor thin film. A semiconductor thin film comprising the steps of selectively forming a mask layer on a region, again amorphizing the semiconductor thin film in a portion not covered with the mask layer, and crystallizing the semiconductor thin film. Crystallization method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62029356A JP2550968B2 (en) | 1987-02-10 | 1987-02-10 | Crystallization method of semiconductor thin film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62029356A JP2550968B2 (en) | 1987-02-10 | 1987-02-10 | Crystallization method of semiconductor thin film |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63196032A true JPS63196032A (en) | 1988-08-15 |
JP2550968B2 JP2550968B2 (en) | 1996-11-06 |
Family
ID=12273922
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62029356A Expired - Fee Related JP2550968B2 (en) | 1987-02-10 | 1987-02-10 | Crystallization method of semiconductor thin film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2550968B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02288328A (en) * | 1989-04-28 | 1990-11-28 | Canon Inc | Method of growing crystal |
JPH03125422A (en) * | 1989-10-09 | 1991-05-28 | Canon Inc | Growing method for crystal |
CN102668038A (en) * | 2009-11-04 | 2012-09-12 | 瓦里安半导体设备公司 | Self-aligned masking for solar cell manufacture |
-
1987
- 1987-02-10 JP JP62029356A patent/JP2550968B2/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02288328A (en) * | 1989-04-28 | 1990-11-28 | Canon Inc | Method of growing crystal |
JPH03125422A (en) * | 1989-10-09 | 1991-05-28 | Canon Inc | Growing method for crystal |
CN102668038A (en) * | 2009-11-04 | 2012-09-12 | 瓦里安半导体设备公司 | Self-aligned masking for solar cell manufacture |
JP2013510432A (en) * | 2009-11-04 | 2013-03-21 | バリアン・セミコンダクター・エクイップメント・アソシエイツ・インコーポレイテッド | Self-aligned masking for solar cell manufacturing |
Also Published As
Publication number | Publication date |
---|---|
JP2550968B2 (en) | 1996-11-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |