JPH0252419A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

Info

Publication number
JPH0252419A
JPH0252419A JP20365788A JP20365788A JPH0252419A JP H0252419 A JPH0252419 A JP H0252419A JP 20365788 A JP20365788 A JP 20365788A JP 20365788 A JP20365788 A JP 20365788A JP H0252419 A JPH0252419 A JP H0252419A
Authority
JP
Japan
Prior art keywords
film
amorphous
region
regions
crystallized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20365788A
Other languages
Japanese (ja)
Inventor
Kazuhiro Tajima
田島 和浩
Takashi Noguchi
隆 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP20365788A priority Critical patent/JPH0252419A/en
Publication of JPH0252419A publication Critical patent/JPH0252419A/en
Pending legal-status Critical Current

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  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To crystallize a desired region by a method wherein ions are implanted selectively into an amorphous semiconductor film, a solid growth operation is executed in the amorphous semiconductor film and the amorphous semiconductor film is crystallized. CONSTITUTION:A polycrystalline Si film 14 is deposited on a quartz substrate 13 by using CVD; ions of Si<+> 15 are implanted into the polycrystalline Si film 14; this polycrystalline Si film is made amorphous. When an amorphous Si film 11 is formed, it is not required to implant the ions of Si<+> 15. Then, a mask 21 of a photoresist is formed in such a way that, in the amorphous Si film 11, regions 16 to be crystallized are covered and regions 17 not to be crystallized are exposed. In this state, ions of Co<+> 22 are implanted into the amorphous Si film 11; in addition, the mask 21 is removed; a solid growth operation is executed in the amorphous Si film 11 by using a low-temperature heat treatment. A nucleus 12 is not generated in the regions 17 into which the ions of Co<+> 22 have been implanted. Accordingly, crystallization proceeds only in the regions 16; the regions 16 become islands in a crystallized region; it is possible to form the crystallized region in a desired region.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、絶縁体基板上に半導体膜を有する半導体基板
の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor substrate having a semiconductor film on an insulating substrate.

〔発明の)既要〕[Requirement of the invention]

本発明は、上記の様な半導体基板の製造方法において、
炭素または酸素またはこれらを含む物質を絶縁体基板上
の非晶質半導体膜に選択的にイオン注入し、この非晶質
半導体膜で固相成長を行わせてこの非晶質半導体膜を結
晶化させることによって、所望の領域のみが結晶化され
ている半導体基(反や結晶粒径の大きな半導体基板を製
造することができる様にしたものである。
The present invention provides a method for manufacturing a semiconductor substrate as described above.
Selective ion implantation of carbon, oxygen, or a substance containing these into an amorphous semiconductor film on an insulator substrate, and solid phase growth is performed on this amorphous semiconductor film to crystallize the amorphous semiconductor film. By doing so, it is possible to manufacture a semiconductor substrate in which only desired regions are crystallized (semiconductor substrates with large crystal grain sizes).

〔従来の技術] 絶縁体基板上に半導体膜を有する半導体基板は、薄膜ト
ランジスタの形成等に用いられており、例えば、石英基
板上に多結晶Si膜をCVDで堆積させたものがある。
[Prior Art] Semiconductor substrates having a semiconductor film on an insulating substrate are used for forming thin film transistors, etc., and for example, there is one in which a polycrystalline Si film is deposited on a quartz substrate by CVD.

しかし、多結晶Si膜をCVDで堆積させただけでは結
晶粒径があまり大きくない。このため、キャリア移動度
もあまり高くなく、高性能の薄膜トランジスタを得るこ
とができない。
However, simply depositing a polycrystalline Si film by CVD does not result in a very large crystal grain size. Therefore, the carrier mobility is not very high, and a high-performance thin film transistor cannot be obtained.

そこで、CVDで堆積させた多結晶Si膜にSt”をイ
オン注入して一旦非晶質Si膜とし、この非晶質Si膜
で固相成長を行わせて、結晶粒径の大きな多結晶Si膜
とする方法が考えられている(例えば、特開昭61−1
27118号公報)。
Therefore, by ion-implanting St'' into a polycrystalline Si film deposited by CVD to temporarily form an amorphous Si film, solid phase growth is performed using this amorphous Si film, and polycrystalline Si with a large crystal grain size is grown. A method of forming a film is being considered (for example, Japanese Patent Application Laid-open No. 61-1
27118).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかじ固相成長では、第4図に示す様に、非晶質Si模
膜ll中ランダムな位置に結晶化の核12が発生する。
However, in solid phase growth, crystallization nuclei 12 are generated at random positions in the amorphous Si pattern, as shown in FIG.

従って上述の従来例では、所望の領域のみが結晶化され
ている半導体基板を製造することができない。
Therefore, in the conventional example described above, it is not possible to manufacture a semiconductor substrate in which only desired regions are crystallized.

また、核12から成長した結晶粒同士が接した段階で固
相成長が停止するが、核12はランダムな位置に発生す
るので、上述の従来例でも結晶粒径が十分に大きな半導
体基板は製造することができない。
In addition, solid phase growth stops when the crystal grains grown from the nuclei 12 come into contact with each other, but the nuclei 12 are generated at random positions, so even in the conventional example described above, semiconductor substrates with sufficiently large crystal grain sizes can be manufactured. Can not do it.

[課題を解決するための手段] 本発明による半導体基板の製造方法は、絶縁体基板13
上に非晶質半導体膜11を形成する工程と、炭素または
酸素またはこれらを含む物質を前記非晶質半導体膜11
へ選択的にイオン注入する工程と、前記イオン注入を行
った前記非晶質半導体膜11で固相成長を行わせてこの
非晶質半導体11%11を結晶化させる工程とを夫々具
備している。
[Means for Solving the Problems] A method for manufacturing a semiconductor substrate according to the present invention includes an insulator substrate 13
a step of forming an amorphous semiconductor film 11 on the amorphous semiconductor film 11; and a step of forming an amorphous semiconductor film 11 on the amorphous semiconductor film 11;
and a step of performing solid phase growth on the amorphous semiconductor film 11 into which the ions have been implanted to crystallize the amorphous semiconductor 11% 11, respectively. There is.

〔作用〕 本発明による半導体基板の製造方法では、非晶質半導体
膜11のうちの選択的にイオン注入した領域において、
結晶化の核12の発生率が極めて低い。
[Function] In the method for manufacturing a semiconductor substrate according to the present invention, in the selectively ion-implanted region of the amorphous semiconductor film 11,
The incidence of crystallization nuclei 12 is extremely low.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図〜第3図を参照しなが
ら説明する。
Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1 to 3.

本実施例では、第1A図に示す様に、石英基板13上に
多結晶Si膜14をCVDで堆積させ、多結晶Si膜1
4にSi”15をイオン注入してこの多結晶Si膜14
を非晶質化させる。
In this embodiment, as shown in FIG. 1A, a polycrystalline Si film 14 is deposited on a quartz substrate 13 by CVD.
This polycrystalline Si film 14 is formed by ion-implanting Si" 15 into
becomes amorphous.

但し、最初から非晶質Si膜を石英基板13上に形成す
れば、Si″ 15のイオン注入は不要である。
However, if an amorphous Si film is formed on the quartz substrate 13 from the beginning, ion implantation of Si'' 15 is not necessary.

次に、第1B図に示す様に、多結晶Si膜14から非晶
質化させた非晶質Si膜11のうちで、結晶化させたい
領域16のみを覆い、結晶化を抑制したい領域17を露
出させる様に、フォトレジストのマスク21を形成する
Next, as shown in FIG. 1B, in the amorphous Si film 11 made from the polycrystalline Si film 14, only the region 16 to be crystallized is covered, and the region 17 to be suppressed from crystallization is covered. A photoresist mask 21 is formed to expose the area.

そしてこの状態で、CO”22を非晶質Si膜11中へ
5 X 10 ”cm−2以上のドーズ撥となる様にイ
オン注入し、更に、マスク21を除去し、低温の熱処理
によって非晶質Si膜11で固相成長を行わせる。
In this state, CO''22 is ion-implanted into the amorphous Si film 11 with a dose repellency of 5 x 10''cm-2 or more, and then the mask 21 is removed and the amorphous silicon is removed by low-temperature heat treatment. Solid phase growth is performed on the quality Si film 11.

すると、CO”22がイオン注入されていない領域16
では、0.5時間程度の熱処理で、結晶化の核12が発
生して結晶化が始まる。これに対して、CO”22がイ
オン注入された領域17では、146時間程度の熱処理
を行わなければ、核12が発生しない。
Then, a region 16 where CO''22 is not ion-implanted
Then, by heat treatment for about 0.5 hours, crystallization nuclei 12 are generated and crystallization begins. On the other hand, in the region 17 into which CO''22 is ion-implanted, the nucleus 12 is not generated unless heat treatment is performed for about 146 hours.

従って、第2図に示す様に領域16を領域17で包囲し
、固相成長の時間を制御すれば、領域16でのみ結晶化
が進行して、領域16は結晶化領域のアイランドとなる
。つまり、所望の領域に結晶化領域を形成することがで
きる。
Therefore, as shown in FIG. 2, if region 16 is surrounded by region 17 and the solid phase growth time is controlled, crystallization will proceed only in region 16, and region 16 will become an island of crystallized regions. In other words, a crystallized region can be formed in a desired region.

また、複数の領域16を互いに離間させて領域17中に
形成すれば、結晶化領域の複数のアイランドが形成され
、非晶質のままで残っているアイランド間の領域を素子
分離領域とすることができる。
Furthermore, if a plurality of regions 16 are formed in the region 17 while being separated from each other, a plurality of islands of crystallized regions are formed, and the regions between the islands that remain amorphous can be used as element isolation regions. Can be done.

また、第3A図に示す様に、非晶質Si膜11のうちの
極めて狭い領域を領域16とし、残りの広い領域を領域
17とすれば、領域17で核12が発生する前に、領域
16で始まった結晶化を領域17にまで広げることがで
きる。
Furthermore, as shown in FIG. 3A, if an extremely narrow region of the amorphous Si film 11 is defined as a region 16 and the remaining wide region is defined as a region 17, before the nucleus 12 is generated in the region 17, the region The crystallization started at 16 can be extended to region 17.

従って、第3B図から明らかな様に、領域16から成長
した結晶粒23の粒径が非常に大きく、非晶質Si膜1
1を単結晶化できる可能性もある。
Therefore, as is clear from FIG. 3B, the grain size of the crystal grains 23 grown from the region 16 is very large, and the amorphous Si film 1
There is also a possibility that 1 can be made into a single crystal.

このため、結晶粒23を有する多結晶Si膜24ではキ
ャリア移動度が高く、この多結晶Si膜24に高性能の
薄膜トランジスタ等を形成することができる。
Therefore, carrier mobility is high in the polycrystalline Si film 24 having the crystal grains 23, and high performance thin film transistors and the like can be formed in this polycrystalline Si film 24.

なお、非晶質Si膜11の結晶化を抑制するために本実
施例ではCO”22をイオン注入したが、CやOの単体
原子のイオンを用いることもでき、Cや0を含む他の分
子のイオンを用いることもできる。
In order to suppress crystallization of the amorphous Si film 11, CO''22 was ion-implanted in this embodiment, but ions of C or O as a single atom can also be used, and other ions including C or 0 can also be used. Molecular ions can also be used.

〔発明の効果〕〔Effect of the invention〕

本発明による半導体基板の製造方法では、非晶質半導体
膜のうちの選択的にイオン注入した領域において結晶化
の核の発生率が極めて低いので、所望の領域のみが結晶
化されている半導体基板を製造することができる。
In the method for manufacturing a semiconductor substrate according to the present invention, the rate of occurrence of crystallization nuclei in the selectively implanted regions of the amorphous semiconductor film is extremely low, so that the semiconductor substrate is crystallized only in the desired regions. can be manufactured.

また、イオン注入を行っておらず核の発生率が高い領域
からイオン注入を行って核の発生率が低い領域にまで結
晶を成長させることによって、結晶粒径の大きな半導体
基板を製造することができる。
In addition, it is possible to manufacture semiconductor substrates with large crystal grain sizes by performing ion implantation from areas where ion implantation is not performed and where the rate of nucleus generation is high to areas where the rate of nucleus generation is low. can.

状況を示す平面図、第3図は一実施例において結晶粒径
の大きな半導体基板を製造する場合を順次に示す側断面
図である。
FIG. 3 is a plan view showing the situation, and FIG. 3 is a side sectional view sequentially showing the case where a semiconductor substrate with a large crystal grain size is manufactured in one embodiment.

第4図は本発明の一従来例における結晶化の核の発生状
況を示しており第2図に対応する平面図である。
FIG. 4 is a plan view corresponding to FIG. 2, showing the generation of crystallization nuclei in a conventional example of the present invention.

なお図面に用いた符号において、 L L−−−一・−−一−−−−−非晶質Si膜11−
一・−一−−−−−核 13−−−−−・−−−−−−−一石英基板22−一−
−−−−−−−CO” 23−−−−−−−−−−−−一結晶粒24−−−−−
−−−−一多結晶Si膜である。
In addition, in the symbols used in the drawings, L L---1・---1---Amorphous Si film 11-
1・−1−−−−−Nucle 13−−−−−・−−−−−−−1 Quartz substrate 22−1−
----------CO'' 23----------One crystal grain 24--
---It is a polycrystalline Si film.

Claims (1)

【特許請求の範囲】 絶縁体基板上に非晶質半導体膜を形成する工程と、 炭素または酸素またはこれらを含む物質を前記非晶質半
導体膜へ選択的にイオン注入する工程と、前記イオン注
入を行った前記非晶質半導体膜で固相成長を行わせてこ
の非晶質半導体膜を結晶化させる工程とを夫々具備する
半導体基板の製造方法。
[Claims] A step of forming an amorphous semiconductor film on an insulating substrate, a step of selectively ion-implanting carbon, oxygen, or a substance containing these into the amorphous semiconductor film, and the ion implantation. A method for manufacturing a semiconductor substrate, comprising the steps of performing solid phase growth on the amorphous semiconductor film that has been subjected to the above steps to crystallize the amorphous semiconductor film.
JP20365788A 1988-08-16 1988-08-16 Manufacture of semiconductor substrate Pending JPH0252419A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20365788A JPH0252419A (en) 1988-08-16 1988-08-16 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20365788A JPH0252419A (en) 1988-08-16 1988-08-16 Manufacture of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH0252419A true JPH0252419A (en) 1990-02-22

Family

ID=16477689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20365788A Pending JPH0252419A (en) 1988-08-16 1988-08-16 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH0252419A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120715A (en) * 1989-10-04 1991-05-22 Canon Inc Method of crystal growth and crystal
NL9301811A (en) * 1992-10-28 1994-05-16 Ryoden Semiconductor Syst Eng Thin film field effect transistor and method of manufacturing it, as well as a semiconductor element provided therewith.
KR100437296B1 (en) * 1994-06-15 2004-11-06 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Thin film transistor and its manufacturing method
US6875628B1 (en) * 1993-05-26 2005-04-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method of the same
CN100350627C (en) * 1993-05-26 2007-11-21 株式会社半导体能源研究所 Semiconductor device and its mfg. method
US7339188B1 (en) * 1999-02-10 2008-03-04 Lg.Philips Lcd Co., Ltd. Polycrystalline silicon film containing Ni

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120715A (en) * 1989-10-04 1991-05-22 Canon Inc Method of crystal growth and crystal
NL9301811A (en) * 1992-10-28 1994-05-16 Ryoden Semiconductor Syst Eng Thin film field effect transistor and method of manufacturing it, as well as a semiconductor element provided therewith.
US5514880A (en) * 1992-10-28 1996-05-07 Mitsubishi Denki Kabushiki Kaisha Field effect thin-film transistor for an SRAM with reduced standby current
US5736438A (en) * 1992-10-28 1998-04-07 Mitsubishi Denki Kabushiki Kaisha Field effect thin-film transistor and method of manufacturing the same as well as semiconductor device provided with the same
US6875628B1 (en) * 1993-05-26 2005-04-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method of the same
CN100350627C (en) * 1993-05-26 2007-11-21 株式会社半导体能源研究所 Semiconductor device and its mfg. method
KR100437296B1 (en) * 1994-06-15 2004-11-06 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Thin film transistor and its manufacturing method
US7339188B1 (en) * 1999-02-10 2008-03-04 Lg.Philips Lcd Co., Ltd. Polycrystalline silicon film containing Ni
US7390727B2 (en) 1999-02-10 2008-06-24 Lg Display Co., Ltd. Polycrystalline silicon film containing Ni

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