GB1484331A - Computer system - Google Patents
Computer systemInfo
- Publication number
- GB1484331A GB1484331A GB46126/74A GB4612674A GB1484331A GB 1484331 A GB1484331 A GB 1484331A GB 46126/74 A GB46126/74 A GB 46126/74A GB 4612674 A GB4612674 A GB 4612674A GB 1484331 A GB1484331 A GB 1484331A
- Authority
- GB
- United Kingdom
- Prior art keywords
- computer
- reserve
- instruction
- data
- delay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
- H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
- H04Q3/54558—Redundancy, stand-by
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
- Apparatus For Radiation Diagnosis (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE7314713A SE369345B (enrdf_load_stackoverflow) | 1973-10-30 | 1973-10-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1484331A true GB1484331A (en) | 1977-09-01 |
Family
ID=20318960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB46126/74A Expired GB1484331A (en) | 1973-10-30 | 1974-10-24 | Computer system |
Country Status (20)
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3416138A (en) * | 1965-08-25 | 1968-12-10 | Bell Telephone Labor Inc | Data processor and method for operation thereof |
DE2117128A1 (de) * | 1971-04-07 | 1972-10-19 | Siemens Ag | Verfahren zum Ein- und Ausschalten von Systemeinheiten in einem modular aufgebauten Verarbeitungssystem |
FR2182259A5 (enrdf_load_stackoverflow) * | 1972-04-24 | 1973-12-07 | Cii |
-
1973
- 1973-10-30 SE SE7314713A patent/SE369345B/xx unknown
-
1974
- 1974-10-10 IN IN2272/CAL/74A patent/IN141771B/en unknown
- 1974-10-14 FI FI2991/74A patent/FI56456C/sv active
- 1974-10-23 NL NLAANVRAGE7413875,A patent/NL188871C/xx not_active IP Right Cessation
- 1974-10-24 GB GB46126/74A patent/GB1484331A/en not_active Expired
- 1974-10-28 DD DD181961A patent/DD115960A5/xx unknown
- 1974-10-28 FR FR7435993A patent/FR2249388B1/fr not_active Expired
- 1974-10-28 YU YU2871/74A patent/YU36232B/xx unknown
- 1974-10-29 NO NO743886A patent/NO141282C/no unknown
- 1974-10-29 CH CH1450174A patent/CH593520A5/xx not_active IP Right Cessation
- 1974-10-29 DK DK563174A patent/DK143819C/da not_active IP Right Cessation
- 1974-10-29 JP JP49124827A patent/JPS5826053B2/ja not_active Expired
- 1974-10-29 SU SU742073064A patent/SU1068050A3/ru active
- 1974-10-29 HU HU74EI00000571A patent/HU170964B/hu unknown
- 1974-10-29 CA CA212,572A patent/CA1026871A/en not_active Expired
- 1974-10-29 ES ES431448A patent/ES431448A1/es not_active Expired
- 1974-10-29 BR BR8994/74A patent/BR7408994D0/pt unknown
- 1974-10-29 BE BE150019A patent/BE821638A/xx not_active IP Right Cessation
- 1974-10-30 IT IT28970/74A patent/IT1025327B/it active
- 1974-10-30 CS CS747410A patent/CS216670B2/cs unknown
Also Published As
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4523274A (en) | Data processing system with processors having different processing speeds sharing a common bus | |
US6330683B1 (en) | Method for aligning clock and data signals received from a RAM | |
US6101612A (en) | Apparatus for aligning clock and data signals received from a RAM | |
US4172282A (en) | Processor controlled memory refresh | |
US4503490A (en) | Distributed timing system | |
JPH04257932A (ja) | ディジタルシグナルプロセッサのエミュレート用チップ | |
GB1487953A (en) | Asynchronous communications bus | |
GB2143060A (en) | Data processing system | |
GB1418708A (en) | Data processing systems | |
JPH02253464A (ja) | プログラマブルなデータ転送タイミング | |
US4755964A (en) | Memory control circuit permitting microcomputer system to utilize static and dynamic rams | |
JPH0550775B2 (enrdf_load_stackoverflow) | ||
US5079694A (en) | Data processing apparatus having a working memory area | |
GB1484331A (en) | Computer system | |
KR940004461A (ko) | 데이터전송장치 및 멀티프로세서시스템 | |
US4244028A (en) | Digital microprocessor having a time-shared adder | |
JPS61114362A (ja) | 共有メモリアクセス制御方式 | |
SU613402A1 (ru) | Запоминающее устройство | |
EP1122736B1 (en) | ATD generation in a synchronous memory | |
SU1251075A1 (ru) | Устройство дл распаковки команд | |
SU1660147A1 (ru) | Генератор псевдослучайных последовательностей | |
SU930274A1 (ru) | Устройство программного управлени исполнительными механизмами | |
SU1642474A1 (ru) | Устройство дл контрол последовательности событий | |
SU1302288A2 (ru) | Устройство дл сопр жени цифровой вычислительной машины с внешними устройствами | |
SU1622935A1 (ru) | Асинхронный распределитель |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed [section 19, patents act 1949] | ||
PE20 | Patent expired after termination of 20 years |
Effective date: 19941023 |