GB1446739A - Method of manufacturing an integrated circuit device of the dual- in-line type - Google Patents

Method of manufacturing an integrated circuit device of the dual- in-line type

Info

Publication number
GB1446739A
GB1446739A GB5332473A GB5332473A GB1446739A GB 1446739 A GB1446739 A GB 1446739A GB 5332473 A GB5332473 A GB 5332473A GB 5332473 A GB5332473 A GB 5332473A GB 1446739 A GB1446739 A GB 1446739A
Authority
GB
United Kingdom
Prior art keywords
lead frame
pins
integrated circuit
bar
nov
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5332473A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
ATES Componenti Elettronici SpA
SGS ATES Componenti Elettronici SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ATES Componenti Elettronici SpA, SGS ATES Componenti Elettronici SpA filed Critical ATES Componenti Elettronici SpA
Publication of GB1446739A publication Critical patent/GB1446739A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
GB5332473A 1972-11-16 1973-11-16 Method of manufacturing an integrated circuit device of the dual- in-line type Expired GB1446739A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT31713/72A IT974672B (it) 1972-11-16 1972-11-16 Dissipatore di calore da incorpo rare in circuiti integrati con contenitore in resina

Publications (1)

Publication Number Publication Date
GB1446739A true GB1446739A (en) 1976-08-18

Family

ID=11234262

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5332473A Expired GB1446739A (en) 1972-11-16 1973-11-16 Method of manufacturing an integrated circuit device of the dual- in-line type

Country Status (7)

Country Link
JP (1) JPS501660A (enExample)
DE (1) DE2357350C3 (enExample)
ES (1) ES420805A1 (enExample)
FR (1) FR2207356B1 (enExample)
GB (1) GB1446739A (enExample)
IT (1) IT974672B (enExample)
NL (1) NL7315711A (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5651328Y2 (enExample) * 1976-08-18 1981-12-01
FR2495376A1 (fr) * 1980-12-02 1982-06-04 Thomson Csf Boitiers pour composants semiconducteurs de puissance a cosses de type faston
IT1218271B (it) * 1981-04-13 1990-04-12 Ates Componenti Elettron Procedimento per la fabbricazione di contenitori in plastica con dissipatore termico per circuiti integrati e combinazione di stampo e dissipatori utilizzabile con tale procedimento

Also Published As

Publication number Publication date
JPS501660A (enExample) 1975-01-09
FR2207356B1 (enExample) 1976-11-19
DE2357350B2 (de) 1975-05-22
FR2207356A1 (enExample) 1974-06-14
NL7315711A (enExample) 1974-05-20
DE2357350C3 (de) 1980-01-24
DE2357350A1 (de) 1974-06-12
IT974672B (it) 1974-07-10
ES420805A1 (es) 1976-04-16

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee