GB1416650A - Method of depositing electrode leads - Google Patents

Method of depositing electrode leads

Info

Publication number
GB1416650A
GB1416650A GB2766573A GB2766573A GB1416650A GB 1416650 A GB1416650 A GB 1416650A GB 2766573 A GB2766573 A GB 2766573A GB 2766573 A GB2766573 A GB 2766573A GB 1416650 A GB1416650 A GB 1416650A
Authority
GB
United Kingdom
Prior art keywords
layer
tracks
chip
leads
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2766573A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of GB1416650A publication Critical patent/GB1416650A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations

Landscapes

  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
GB2766573A 1972-06-23 1973-06-11 Method of depositing electrode leads Expired GB1416650A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US26555072A 1972-06-23 1972-06-23

Publications (1)

Publication Number Publication Date
GB1416650A true GB1416650A (en) 1975-12-03

Family

ID=23010926

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2766573A Expired GB1416650A (en) 1972-06-23 1973-06-11 Method of depositing electrode leads

Country Status (10)

Country Link
US (1) US3801477A (https=)
JP (1) JPS4957373A (https=)
BE (1) BE801196A (https=)
CA (1) CA982699A (https=)
DE (1) DE2331534A1 (https=)
FR (1) FR2189873B1 (https=)
GB (1) GB1416650A (https=)
IT (1) IT989353B (https=)
NL (1) NL7308737A (https=)
SE (1) SE381777B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3983284A (en) * 1972-06-02 1976-09-28 Thomson-Csf Flat connection for a semiconductor multilayer structure
US4022930A (en) * 1975-05-30 1977-05-10 Bell Telephone Laboratories, Incorporated Multilevel metallization for integrated circuits
US4188438A (en) * 1975-06-02 1980-02-12 National Semiconductor Corporation Antioxidant coating of copper parts for thermal compression gang bonding of semiconductive devices
JP2755594B2 (ja) * 1988-03-30 1998-05-20 株式会社 東芝 セラミックス回路基板
JP4815771B2 (ja) * 2004-09-01 2011-11-16 住友電気工業株式会社 電気部品の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3495324A (en) * 1967-11-13 1970-02-17 Sperry Rand Corp Ohmic contact for planar devices
GB1250248A (https=) * 1969-06-12 1971-10-20

Also Published As

Publication number Publication date
DE2331534A1 (de) 1974-01-17
CA982699A (en) 1976-01-27
AU5724073A (en) 1975-01-09
BE801196A (fr) 1973-10-15
SE381777B (sv) 1975-12-15
FR2189873B1 (https=) 1977-09-09
JPS4957373A (https=) 1974-06-04
FR2189873A1 (https=) 1974-01-25
IT989353B (it) 1975-05-20
NL7308737A (https=) 1973-12-27
US3801477A (en) 1974-04-02

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee