SE381777B - Forfarande for att framstella en elektrisk ledare - Google Patents

Forfarande for att framstella en elektrisk ledare

Info

Publication number
SE381777B
SE381777B SE7308622A SE7308622A SE381777B SE 381777 B SE381777 B SE 381777B SE 7308622 A SE7308622 A SE 7308622A SE 7308622 A SE7308622 A SE 7308622A SE 381777 B SE381777 B SE 381777B
Authority
SE
Sweden
Prior art keywords
procedure
manufacturing
electric conductor
conductor
electric
Prior art date
Application number
SE7308622A
Other languages
English (en)
Swedish (sv)
Inventor
R S Ronen
E A James
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of SE381777B publication Critical patent/SE381777B/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2405—Shape
    • H01L2224/24051—Conformal with the semiconductor or solid-state device
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
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    • H01L2924/01082—Lead [Pb]
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    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
SE7308622A 1972-06-23 1973-06-19 Forfarande for att framstella en elektrisk ledare SE381777B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US26555072A 1972-06-23 1972-06-23

Publications (1)

Publication Number Publication Date
SE381777B true SE381777B (sv) 1975-12-15

Family

ID=23010926

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7308622A SE381777B (sv) 1972-06-23 1973-06-19 Forfarande for att framstella en elektrisk ledare

Country Status (10)

Country Link
US (1) US3801477A (xx)
JP (1) JPS4957373A (xx)
BE (1) BE801196A (xx)
CA (1) CA982699A (xx)
DE (1) DE2331534A1 (xx)
FR (1) FR2189873B1 (xx)
GB (1) GB1416650A (xx)
IT (1) IT989353B (xx)
NL (1) NL7308737A (xx)
SE (1) SE381777B (xx)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3983284A (en) * 1972-06-02 1976-09-28 Thomson-Csf Flat connection for a semiconductor multilayer structure
US4022930A (en) * 1975-05-30 1977-05-10 Bell Telephone Laboratories, Incorporated Multilevel metallization for integrated circuits
US4188438A (en) * 1975-06-02 1980-02-12 National Semiconductor Corporation Antioxidant coating of copper parts for thermal compression gang bonding of semiconductive devices
JP2755594B2 (ja) * 1988-03-30 1998-05-20 株式会社 東芝 セラミックス回路基板
JP4815771B2 (ja) * 2004-09-01 2011-11-16 住友電気工業株式会社 電気部品の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3495324A (en) * 1967-11-13 1970-02-17 Sperry Rand Corp Ohmic contact for planar devices
GB1250248A (xx) * 1969-06-12 1971-10-20

Also Published As

Publication number Publication date
AU5724073A (en) 1975-01-09
CA982699A (en) 1976-01-27
NL7308737A (xx) 1973-12-27
FR2189873A1 (xx) 1974-01-25
JPS4957373A (xx) 1974-06-04
IT989353B (it) 1975-05-20
FR2189873B1 (xx) 1977-09-09
US3801477A (en) 1974-04-02
BE801196A (fr) 1973-10-15
GB1416650A (en) 1975-12-03
DE2331534A1 (de) 1974-01-17

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