GB1295964A - - Google Patents
Info
- Publication number
- GB1295964A GB1295964A GB1295964DA GB1295964A GB 1295964 A GB1295964 A GB 1295964A GB 1295964D A GB1295964D A GB 1295964DA GB 1295964 A GB1295964 A GB 1295964A
- Authority
- GB
- United Kingdom
- Prior art keywords
- semi
- conductor
- support
- etchant
- grooves
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
- Y10T156/1056—Perforating lamina
- Y10T156/1057—Subsequent to assembly of laminae
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T225/00—Severing by tearing or breaking
- Y10T225/10—Methods
- Y10T225/12—With preliminary weakening
Landscapes
- Dicing (AREA)
- Weting (AREA)
- Casings For Electric Apparatus (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US81218269A | 1969-04-01 | 1969-04-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1295964A true GB1295964A (https=) | 1972-11-08 |
Family
ID=25208782
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1295964D Expired GB1295964A (https=) | 1969-04-01 | 1970-03-12 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3762973A (https=) |
| JP (1) | JPS4822014B1 (https=) |
| DE (1) | DE2014246C3 (https=) |
| FR (1) | FR2038128B1 (https=) |
| GB (1) | GB1295964A (https=) |
| IE (1) | IE34051B1 (https=) |
| NL (1) | NL7003693A (https=) |
| SE (1) | SE364141B (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL7313572A (nl) * | 1973-10-03 | 1975-04-07 | Philips Nv | Werkwijze voor het etsen van silicium- of ger- mplakken en halfgeleiderinrichtingen ver- igd met toepassing van deze werkwijze. |
| US4203127A (en) * | 1977-07-18 | 1980-05-13 | Motorola, Inc. | Package and method of packaging semiconductor wafers |
| JPS6041478B2 (ja) * | 1979-09-10 | 1985-09-17 | 富士通株式会社 | 半導体レ−ザ素子の製造方法 |
| DE3524301A1 (de) * | 1985-07-06 | 1987-01-15 | Semikron Gleichrichterbau | Verfahren zum herstellen von halbleiterelementen |
| KR102015336B1 (ko) * | 2017-06-12 | 2019-08-28 | 삼성전자주식회사 | 반도체 패키지 기판의 휨 감소 방법 및 휨 감소 장치 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2970730A (en) * | 1957-01-08 | 1961-02-07 | Motorola Inc | Dicing semiconductor wafers |
-
1969
- 1969-04-01 US US3762973D patent/US3762973A/en not_active Expired - Lifetime
-
1970
- 1970-03-09 IE IE306/70A patent/IE34051B1/xx unknown
- 1970-03-12 GB GB1295964D patent/GB1295964A/en not_active Expired
- 1970-03-16 NL NL7003693A patent/NL7003693A/xx unknown
- 1970-03-25 DE DE2014246A patent/DE2014246C3/de not_active Expired
- 1970-03-31 JP JP2690170A patent/JPS4822014B1/ja active Pending
- 1970-04-01 FR FR7011770A patent/FR2038128B1/fr not_active Expired
- 1970-04-01 SE SE447970A patent/SE364141B/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| IE34051L (en) | 1970-10-01 |
| FR2038128A1 (https=) | 1971-01-08 |
| US3762973A (en) | 1973-10-02 |
| DE2014246B2 (de) | 1979-07-12 |
| NL7003693A (https=) | 1970-10-05 |
| FR2038128B1 (https=) | 1974-03-01 |
| SE364141B (https=) | 1974-02-11 |
| JPS4822014B1 (https=) | 1973-07-03 |
| DE2014246C3 (de) | 1980-03-20 |
| DE2014246A1 (de) | 1970-10-08 |
| IE34051B1 (en) | 1975-01-22 |
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| GB1295964A (https=) | ||
| GB1281298A (en) | IMPROVEMENTS IN OR RELATING TO THE PRODUCTION OF A PROTECTIVE LAYER OF SiO2 ON THE SURFACE OF SEMICONDUCTOR PLATES | |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PCNP | Patent ceased through non-payment of renewal fee |