FR2915625B1 - Procede de transfert d'une couche epitaxiale - Google Patents

Procede de transfert d'une couche epitaxiale

Info

Publication number
FR2915625B1
FR2915625B1 FR0754777A FR0754777A FR2915625B1 FR 2915625 B1 FR2915625 B1 FR 2915625B1 FR 0754777 A FR0754777 A FR 0754777A FR 0754777 A FR0754777 A FR 0754777A FR 2915625 B1 FR2915625 B1 FR 2915625B1
Authority
FR
France
Prior art keywords
transferring
epitaxial layer
epitaxial
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0754777A
Other languages
English (en)
Other versions
FR2915625A1 (fr
Inventor
Vaillant Yves Matthieu Le
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR0754777A priority Critical patent/FR2915625B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to KR1020097018793A priority patent/KR101527063B1/ko
Priority to CN2008800066321A priority patent/CN101636833B/zh
Priority to PCT/IB2008/000967 priority patent/WO2008132569A1/fr
Priority to JP2010504889A priority patent/JP5380429B2/ja
Priority to US12/528,573 priority patent/US7981768B2/en
Priority to EP08737488A priority patent/EP2140488A1/fr
Publication of FR2915625A1 publication Critical patent/FR2915625A1/fr
Application granted granted Critical
Publication of FR2915625B1 publication Critical patent/FR2915625B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
FR0754777A 2007-04-27 2007-04-27 Procede de transfert d'une couche epitaxiale Active FR2915625B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR0754777A FR2915625B1 (fr) 2007-04-27 2007-04-27 Procede de transfert d'une couche epitaxiale
CN2008800066321A CN101636833B (zh) 2007-04-27 2008-04-15 转移外延层的方法
PCT/IB2008/000967 WO2008132569A1 (fr) 2007-04-27 2008-04-15 Procédé pour transférer une couche épitaxiale
JP2010504889A JP5380429B2 (ja) 2007-04-27 2008-04-15 エピタキシャル層を移動させる方法
KR1020097018793A KR101527063B1 (ko) 2007-04-27 2008-04-15 에피택시층 이동 방법
US12/528,573 US7981768B2 (en) 2007-04-27 2008-04-15 Method for transferring an epitaxial layer
EP08737488A EP2140488A1 (fr) 2007-04-27 2008-04-15 Procédé pour transférer une couche épitaxiale

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0754777A FR2915625B1 (fr) 2007-04-27 2007-04-27 Procede de transfert d'une couche epitaxiale

Publications (2)

Publication Number Publication Date
FR2915625A1 FR2915625A1 (fr) 2008-10-31
FR2915625B1 true FR2915625B1 (fr) 2009-10-02

Family

ID=39212207

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0754777A Active FR2915625B1 (fr) 2007-04-27 2007-04-27 Procede de transfert d'une couche epitaxiale

Country Status (7)

Country Link
US (1) US7981768B2 (fr)
EP (1) EP2140488A1 (fr)
JP (1) JP5380429B2 (fr)
KR (1) KR101527063B1 (fr)
CN (1) CN101636833B (fr)
FR (1) FR2915625B1 (fr)
WO (1) WO2008132569A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2467935B (en) 2009-02-19 2013-10-30 Iqe Silicon Compounds Ltd Formation of thin layers of GaAs and germanium materials
US8492325B2 (en) 2010-03-01 2013-07-23 The Procter & Gamble Company Dual-usage liquid laundry detergents comprising a silicone anti-foam
DE102010046215B4 (de) 2010-09-21 2019-01-03 Infineon Technologies Austria Ag Halbleiterkörper mit verspanntem Bereich, Elektronisches Bauelement und ein Verfahren zum Erzeugen des Halbleiterkörpers.
US9548218B2 (en) 2012-02-07 2017-01-17 The Regents Of The University Of Michigan Thermal surface treatment for reuse of wafers after epitaxial lift off
US9257339B2 (en) * 2012-05-04 2016-02-09 Silicon Genesis Corporation Techniques for forming optoelectronic devices
CN103839976A (zh) * 2012-11-27 2014-06-04 中国科学院微电子研究所 一种硅基绝缘体上砷化镓衬底结构及其制备方法
US9064789B2 (en) 2013-08-12 2015-06-23 International Business Machines Corporation Bonded epitaxial oxide structures for compound semiconductor on silicon substrates
JP2015065241A (ja) * 2013-09-24 2015-04-09 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
DE102013020693A1 (de) * 2013-12-04 2015-06-11 Siltectra Gmbh Verfahren zum Erzeugen großflächiger Festkörperschichten
CN108598218B (zh) * 2018-04-26 2020-08-11 上海空间电源研究所 一种外延层刚性-柔性衬底无机键合转移方法
CN109545999B (zh) * 2018-11-21 2021-05-04 京东方科技集团股份有限公司 初始显示装置和柔性显示面板的制造方法
CN111893566A (zh) * 2020-07-21 2020-11-06 璨隆科技发展有限公司 一种氮化镓晶体的制备方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP3112106B2 (ja) * 1991-10-11 2000-11-27 キヤノン株式会社 半導体基材の作製方法
EP1758169A3 (fr) * 1996-08-27 2007-05-23 Seiko Epson Corporation Méthode de séparation, procédé de transfert d'un dispositif à film mince, et dispositif d'affichage à cristaux liquides obtenu par application du procédé de transfert
DE19640594B4 (de) * 1996-10-01 2016-08-04 Osram Gmbh Bauelement
US6210479B1 (en) * 1999-02-26 2001-04-03 International Business Machines Corporation Product and process for forming a semiconductor structure on a host substrate
JP2002110949A (ja) * 2000-09-28 2002-04-12 Canon Inc Soiの熱処理方法及び製造方法
WO2002082514A1 (fr) * 2001-04-04 2002-10-17 Massachusetts Institute Of Technology Procede de fabrication d'un dispositif semi-conducteur
US6723165B2 (en) * 2001-04-13 2004-04-20 Matsushita Electric Industrial Co., Ltd. Method for fabricating Group III nitride semiconductor substrate
JP3803606B2 (ja) * 2001-04-13 2006-08-02 松下電器産業株式会社 Iii族窒化物半導体基板の製造方法
DE602004013292T2 (de) * 2004-06-11 2009-05-28 S.O.I. Tec Silicon On Insulator Technologies S.A. Verfahren zur Herstellung eines Verbundsubstrats
JP2006287166A (ja) * 2005-04-05 2006-10-19 Advanced Lcd Technologies Development Center Co Ltd 半導体素子保持装置、半導体素子の剥離方法および表示装置
JP2006344865A (ja) * 2005-06-10 2006-12-21 Toyoko Kagaku Co Ltd Soi基板及び該基板の製造方法
US7608471B2 (en) * 2005-08-09 2009-10-27 Avago Technologies General Ip (Singapore) Pte. Ltd. Method and apparatus for integrating III-V semiconductor devices into silicon processes

Also Published As

Publication number Publication date
CN101636833B (zh) 2011-06-08
WO2008132569A1 (fr) 2008-11-06
JP5380429B2 (ja) 2014-01-08
KR20100014953A (ko) 2010-02-11
US7981768B2 (en) 2011-07-19
US20110008948A1 (en) 2011-01-13
CN101636833A (zh) 2010-01-27
FR2915625A1 (fr) 2008-10-31
KR101527063B1 (ko) 2015-06-08
JP2010525599A (ja) 2010-07-22
EP2140488A1 (fr) 2010-01-06

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