FR2832854B1 - Fabrication de memoire dram et de transistor mos - Google Patents

Fabrication de memoire dram et de transistor mos

Info

Publication number
FR2832854B1
FR2832854B1 FR0115362A FR0115362A FR2832854B1 FR 2832854 B1 FR2832854 B1 FR 2832854B1 FR 0115362 A FR0115362 A FR 0115362A FR 0115362 A FR0115362 A FR 0115362A FR 2832854 B1 FR2832854 B1 FR 2832854B1
Authority
FR
France
Prior art keywords
manufacture
mos transistor
dram memory
dram
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0115362A
Other languages
English (en)
Other versions
FR2832854A1 (fr
Inventor
Marc Piazza
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0115362A priority Critical patent/FR2832854B1/fr
Priority to US10/304,580 priority patent/US6800515B2/en
Publication of FR2832854A1 publication Critical patent/FR2832854A1/fr
Application granted granted Critical
Publication of FR2832854B1 publication Critical patent/FR2832854B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/312—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with a bit line higher than the capacitor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
FR0115362A 2001-11-28 2001-11-28 Fabrication de memoire dram et de transistor mos Expired - Fee Related FR2832854B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0115362A FR2832854B1 (fr) 2001-11-28 2001-11-28 Fabrication de memoire dram et de transistor mos
US10/304,580 US6800515B2 (en) 2001-11-28 2002-11-26 DRAM and MOS transistor manufacturing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0115362A FR2832854B1 (fr) 2001-11-28 2001-11-28 Fabrication de memoire dram et de transistor mos

Publications (2)

Publication Number Publication Date
FR2832854A1 FR2832854A1 (fr) 2003-05-30
FR2832854B1 true FR2832854B1 (fr) 2004-03-12

Family

ID=8869864

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0115362A Expired - Fee Related FR2832854B1 (fr) 2001-11-28 2001-11-28 Fabrication de memoire dram et de transistor mos

Country Status (2)

Country Link
US (1) US6800515B2 (fr)
FR (1) FR2832854B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8692310B2 (en) 2009-02-09 2014-04-08 Spansion Llc Gate fringing effect based channel formation for semiconductor device
US11832438B2 (en) * 2019-06-28 2023-11-28 Intel Corporation Capacitor connections in dielectric layers

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4837176A (en) * 1987-01-30 1989-06-06 Motorola Inc. Integrated circuit structures having polycrystalline electrode contacts and process
US5338700A (en) * 1993-04-14 1994-08-16 Micron Semiconductor, Inc. Method of forming a bit line over capacitor array of memory cells
JP3623834B2 (ja) * 1995-01-31 2005-02-23 富士通株式会社 半導体記憶装置及びその製造方法
US5858831A (en) * 1998-02-27 1999-01-12 Vanguard International Semiconductor Corporation Process for fabricating a high performance logic and embedded dram devices on a single semiconductor chip
US6008084A (en) * 1998-02-27 1999-12-28 Vanguard International Semiconductor Corporation Method for fabricating low resistance bit line structures, along with bit line structures exhibiting low bit line to bit line coupling capacitance
JP3701469B2 (ja) * 1998-06-12 2005-09-28 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
US5918120A (en) * 1998-07-24 1999-06-29 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating capacitor-over-bit line (COB) dynamic random access memory (DRAM) using tungsten landing plug contacts and Ti/TiN bit lines
KR100276390B1 (ko) * 1998-08-10 2000-12-15 윤종용 반도체 메모리 장치 및 그의 제조 방법
JP2000077625A (ja) * 1998-08-31 2000-03-14 Hitachi Ltd 半導体集積回路装置の製造方法
US5893734A (en) * 1998-09-14 1999-04-13 Vanguard International Semiconductor Corporation Method for fabricating capacitor-under-bit line (CUB) dynamic random access memory (DRAM) using tungsten landing plug contacts
FR2785720B1 (fr) * 1998-11-05 2003-01-03 St Microelectronics Sa Fabrication de memoire dram et de transistors mos
FR2790597B1 (fr) * 1999-02-12 2003-08-15 St Microelectronics Sa Integration de condensateurs
US6436763B1 (en) * 2000-02-07 2002-08-20 Taiwan Semiconductor Manufacturing Company Process for making embedded DRAM circuits having capacitor under bit-line (CUB)
JP3957945B2 (ja) * 2000-03-31 2007-08-15 富士通株式会社 半導体装置及びその製造方法
JP4335490B2 (ja) * 2000-04-14 2009-09-30 富士通マイクロエレクトロニクス株式会社 半導体装置及びその製造方法
US6255161B1 (en) * 2000-10-06 2001-07-03 Nanya Technology Corporation Method of forming a capacitor and a contact plug
US6294426B1 (en) * 2001-01-19 2001-09-25 Taiwan Semiconductor Manufacturing Company Method of fabricating a capacitor under bit line structure with increased capacitance without increasing the aspect ratio for a dry etched bit line contact hole
US6794238B2 (en) * 2001-11-07 2004-09-21 Micron Technology, Inc. Process for forming metallized contacts to periphery transistors

Also Published As

Publication number Publication date
US6800515B2 (en) 2004-10-05
US20030100179A1 (en) 2003-05-29
FR2832854A1 (fr) 2003-05-30

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Legal Events

Date Code Title Description
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Effective date: 20070731