FR2805709B1 - Connexion electrique entre deux faces d'un substrat et procede de realisation - Google Patents

Connexion electrique entre deux faces d'un substrat et procede de realisation

Info

Publication number
FR2805709B1
FR2805709B1 FR0002446A FR0002446A FR2805709B1 FR 2805709 B1 FR2805709 B1 FR 2805709B1 FR 0002446 A FR0002446 A FR 0002446A FR 0002446 A FR0002446 A FR 0002446A FR 2805709 B1 FR2805709 B1 FR 2805709B1
Authority
FR
France
Prior art keywords
faces
substrate
making
electrical connection
electrical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0002446A
Other languages
English (en)
Other versions
FR2805709A1 (fr
Inventor
Rochaz Line Vieux
Robert Cuchet
Olivier Girard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0002446A priority Critical patent/FR2805709B1/fr
Priority to JP2001564390A priority patent/JP5329733B2/ja
Priority to PCT/FR2001/000565 priority patent/WO2001065598A1/fr
Priority to US10/204,858 priority patent/US6815827B2/en
Priority to EP01909909A priority patent/EP1259983A1/fr
Publication of FR2805709A1 publication Critical patent/FR2805709A1/fr
Application granted granted Critical
Publication of FR2805709B1 publication Critical patent/FR2805709B1/fr
Priority to JP2012163153A priority patent/JP2012231173A/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
FR0002446A 2000-02-28 2000-02-28 Connexion electrique entre deux faces d'un substrat et procede de realisation Expired - Lifetime FR2805709B1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FR0002446A FR2805709B1 (fr) 2000-02-28 2000-02-28 Connexion electrique entre deux faces d'un substrat et procede de realisation
JP2001564390A JP5329733B2 (ja) 2000-02-28 2001-02-27 基板の2つの面間の電気的接続および製造工程
PCT/FR2001/000565 WO2001065598A1 (fr) 2000-02-28 2001-02-27 Connexion electrique entre deux faces d'un substrat et procede de realisation
US10/204,858 US6815827B2 (en) 2000-02-28 2001-02-27 Electrical connection between two faces of a substrate and manufacturing process
EP01909909A EP1259983A1 (fr) 2000-02-28 2001-02-27 Connexion electrique entre deux faces d'un substrat et procede de realisation
JP2012163153A JP2012231173A (ja) 2000-02-28 2012-07-23 基板の2つの表面の電気的接続およびその方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0002446A FR2805709B1 (fr) 2000-02-28 2000-02-28 Connexion electrique entre deux faces d'un substrat et procede de realisation

Publications (2)

Publication Number Publication Date
FR2805709A1 FR2805709A1 (fr) 2001-08-31
FR2805709B1 true FR2805709B1 (fr) 2002-05-17

Family

ID=8847446

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0002446A Expired - Lifetime FR2805709B1 (fr) 2000-02-28 2000-02-28 Connexion electrique entre deux faces d'un substrat et procede de realisation

Country Status (5)

Country Link
US (1) US6815827B2 (fr)
EP (1) EP1259983A1 (fr)
JP (2) JP5329733B2 (fr)
FR (1) FR2805709B1 (fr)
WO (1) WO2001065598A1 (fr)

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JP2002094082A (ja) * 2000-07-11 2002-03-29 Seiko Epson Corp 光素子及びその製造方法並びに電子機器
US6650496B2 (en) 2001-05-15 2003-11-18 Phs Mems Fully integrated matrix magnetic recording head with independent control
US6744114B2 (en) 2001-08-29 2004-06-01 Honeywell International Inc. Package with integrated inductor and/or capacitor
US6750516B2 (en) 2001-10-18 2004-06-15 Hewlett-Packard Development Company, L.P. Systems and methods for electrically isolating portions of wafers
JP3666591B2 (ja) * 2002-02-01 2005-06-29 株式会社トッパンNecサーキットソリューションズ 半導体チップ搭載用基板の製造方法
DE10205026C1 (de) * 2002-02-07 2003-05-28 Bosch Gmbh Robert Halbleitersubstrat mit einem elektrisch isolierten Bereich, insbesondere zur Vertikalintegration
EP2560199B1 (fr) 2002-04-05 2016-08-03 STMicroelectronics S.r.l. Procédé de fabrication d'une interconnexion isolée traversant un corps de matériau semi-conducteur
EP2506305B1 (fr) * 2002-09-24 2014-11-05 Hamamatsu Photonics K. K. PROCEDE DE FABRICATION D'une Matrice DE PHOTODIODES
SE526366C3 (sv) * 2003-03-21 2005-10-26 Silex Microsystems Ab Elektriska anslutningar i substrat
JP4791534B2 (ja) * 2005-05-18 2011-10-12 コロ テクノロジーズ インコーポレイテッド 超小型電気機械デバイスの製造方法
CA2607885A1 (fr) * 2005-05-18 2006-11-23 Kolo Technologies, Inc. Interconnexion transversale sur plaquette
JP5128470B2 (ja) 2005-06-17 2013-01-23 コロ テクノロジーズ インコーポレイテッド 絶縁延長を有する微小電気機械変換器
DE102005039068A1 (de) * 2005-08-11 2007-02-15 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Halbleitersubstrat und Verfahren zur Herstellung
US20070042563A1 (en) * 2005-08-19 2007-02-22 Honeywell International Inc. Single crystal based through the wafer connections technical field
US8143689B2 (en) * 2005-09-20 2012-03-27 Bae Systems Plc Sensor device
EP1788624B1 (fr) * 2005-11-16 2010-06-09 STMicroelectronics Srl Procédé de fabrication des "deep through vias" dans un composant semi-conducteur
SE530415C2 (sv) * 2006-09-04 2008-05-27 Nanospace Ab Gastrustor
JP5117698B2 (ja) * 2006-09-27 2013-01-16 ルネサスエレクトロニクス株式会社 半導体装置
US7608837B2 (en) * 2006-11-24 2009-10-27 Tower Semiconductor Ltd. High resolution integrated X-ray CMOS image sensor
US10266392B2 (en) 2007-06-07 2019-04-23 E-Pack, Inc. Environment-resistant module, micropackage and methods of manufacturing same
US8049326B2 (en) * 2007-06-07 2011-11-01 The Regents Of The University Of Michigan Environment-resistant module, micropackage and methods of manufacturing same
JP2009181981A (ja) * 2008-01-29 2009-08-13 Renesas Technology Corp 半導体装置の製造方法および半導体装置
JP5473253B2 (ja) * 2008-06-02 2014-04-16 キヤノン株式会社 複数の導電性領域を有する構造体、及びその製造方法
US7737409B2 (en) * 2008-06-12 2010-06-15 Analog Devices, Inc. Silicon detector and method for constructing silicon detectors
FR2953992B1 (fr) * 2009-12-15 2012-05-18 Commissariat Energie Atomique Realisation de structures d'interconnexions tsv formees d'un contour isolant et d'une zone conductrice situee dans le contour et disjointe du contour
US8883539B2 (en) 2010-05-11 2014-11-11 Stichting Energieonderzoek Centrum Nederland Solar cell and method of its manufacture
NL2004698C2 (en) * 2010-05-11 2011-11-15 Stichting Energie Solar cell and method of manufacturing such a solar cell.
JP5700502B2 (ja) * 2010-07-28 2015-04-15 住友電工デバイス・イノベーション株式会社 半導体装置及び製造方法
FR2964793B1 (fr) * 2010-09-09 2014-04-11 Ipdia Dispositif d'interposition
DE102010041101B4 (de) * 2010-09-21 2018-05-30 Robert Bosch Gmbh Bauelement mit einer Durchkontaktierung und ein Verfahren zur Herstellung eines Bauelements mit einer Durchkontaktierung
JP2012227328A (ja) * 2011-04-19 2012-11-15 Sony Corp 半導体装置、半導体装置の製造方法、固体撮像装置及び電子機器
KR101968635B1 (ko) * 2012-11-22 2019-04-12 삼성전자주식회사 잉크젯 프린팅을 이용한 배선 형성 방법
KR102268714B1 (ko) 2014-06-23 2021-06-28 삼성전자주식회사 이미지 센서 및 이의 제조 방법
US10315915B2 (en) 2015-07-02 2019-06-11 Kionix, Inc. Electronic systems with through-substrate interconnects and MEMS device
US20190206827A1 (en) * 2017-12-29 2019-07-04 Intel Corporation Semiconductor package with externally accessible wirebonds
EP3705451A1 (fr) * 2019-03-06 2020-09-09 Murata Manufacturing Co., Ltd. Structure mems comprenant un capot ayant un trou d'interconnexion
KR20210007072A (ko) 2019-07-09 2021-01-20 삼성디스플레이 주식회사 표시 장치
DE102021200083A1 (de) 2021-01-07 2022-07-07 Robert Bosch Gesellschaft mit beschränkter Haftung Mikromechanische Struktur und Verfahren zur Herstellung einer mikromechanischen Struktur

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JPS60101945A (ja) * 1983-11-07 1985-06-06 Nec Kansai Ltd 半導体装置の製造方法
JPH06310489A (ja) * 1993-04-21 1994-11-04 Nissan Motor Co Ltd 半導体基板のエッチング方法
US5646067A (en) * 1995-06-05 1997-07-08 Harris Corporation Method of bonding wafers having vias including conductive material
US5770884A (en) * 1995-06-30 1998-06-23 International Business Machines Corporation Very dense integrated circuit package
JP3430771B2 (ja) * 1996-02-05 2003-07-28 株式会社デンソー 半導体力学量センサの製造方法
JP3418548B2 (ja) * 1997-04-03 2003-06-23 株式会社山武 回路基板およびその製造方法
CN1187800C (zh) * 1997-04-03 2005-02-02 株式会社山武 电路板以及检测器及其制造方法
JP3920399B2 (ja) * 1997-04-25 2007-05-30 株式会社東芝 マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置
JP3184493B2 (ja) * 1997-10-01 2001-07-09 松下電子工業株式会社 電子装置の製造方法
EP0926726A1 (fr) * 1997-12-16 1999-06-30 STMicroelectronics S.r.l. Procédé de fabrication et dispositif électronique avec des contacts à travers le substrat pour la liaison à un tableau
TW436882B (en) * 1998-06-01 2001-05-28 Toshiba Corp Semiconductor device and method for manufacturing the same
US6750516B2 (en) * 2001-10-18 2004-06-15 Hewlett-Packard Development Company, L.P. Systems and methods for electrically isolating portions of wafers
EP1381031A1 (fr) * 2002-07-12 2004-01-14 O-Mass AS Matrice des têtes magnétiques d'écriture selon la technique de couches minces
US6716737B2 (en) * 2002-07-29 2004-04-06 Hewlett-Packard Development Company, L.P. Method of forming a through-substrate interconnect

Also Published As

Publication number Publication date
EP1259983A1 (fr) 2002-11-27
US20030022475A1 (en) 2003-01-30
JP2003526207A (ja) 2003-09-02
US6815827B2 (en) 2004-11-09
WO2001065598A1 (fr) 2001-09-07
JP2012231173A (ja) 2012-11-22
FR2805709A1 (fr) 2001-08-31
JP5329733B2 (ja) 2013-10-30

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