FR2789519B1 - Transistor mos a tension de seuil dynamique equipe d'un limiteur de courant, et procede de realisation d'un tel transistor - Google Patents
Transistor mos a tension de seuil dynamique equipe d'un limiteur de courant, et procede de realisation d'un tel transistorInfo
- Publication number
- FR2789519B1 FR2789519B1 FR9901369A FR9901369A FR2789519B1 FR 2789519 B1 FR2789519 B1 FR 2789519B1 FR 9901369 A FR9901369 A FR 9901369A FR 9901369 A FR9901369 A FR 9901369A FR 2789519 B1 FR2789519 B1 FR 2789519B1
- Authority
- FR
- France
- Prior art keywords
- transistor
- making
- threshold voltage
- current limiter
- dynamic threshold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
- Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9901369A FR2789519B1 (fr) | 1999-02-05 | 1999-02-05 | Transistor mos a tension de seuil dynamique equipe d'un limiteur de courant, et procede de realisation d'un tel transistor |
JP2000597843A JP2002536833A (ja) | 1999-02-05 | 2000-02-04 | 電流リミッタを備えたダイナミックしきい値電圧mosトランジスタ、およびその製造方法 |
EP00901716A EP1153435A1 (fr) | 1999-02-05 | 2000-02-04 | Transistor mos a tension de seuil dynamique equipe d'un limiteur de courant, et procede de realisation d'un tel transistor |
PCT/FR2000/000268 WO2000046858A1 (fr) | 1999-02-05 | 2000-02-04 | Transistor mos a tension de seuil dynamique equipe d'un limiteur de courant, et procede de realisation d'un tel transistor |
US09/890,120 US6787850B1 (en) | 1999-02-05 | 2000-02-04 | Dynamic threshold voltage MOS transistor fitted with a current limiter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9901369A FR2789519B1 (fr) | 1999-02-05 | 1999-02-05 | Transistor mos a tension de seuil dynamique equipe d'un limiteur de courant, et procede de realisation d'un tel transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2789519A1 FR2789519A1 (fr) | 2000-08-11 |
FR2789519B1 true FR2789519B1 (fr) | 2003-03-28 |
Family
ID=9541657
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9901369A Expired - Fee Related FR2789519B1 (fr) | 1999-02-05 | 1999-02-05 | Transistor mos a tension de seuil dynamique equipe d'un limiteur de courant, et procede de realisation d'un tel transistor |
Country Status (5)
Country | Link |
---|---|
US (1) | US6787850B1 (fr) |
EP (1) | EP1153435A1 (fr) |
JP (1) | JP2002536833A (fr) |
FR (1) | FR2789519B1 (fr) |
WO (1) | WO2000046858A1 (fr) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002134746A (ja) * | 2000-10-30 | 2002-05-10 | Toshiba Corp | 半導体装置及びその製造方法 |
JP3845272B2 (ja) * | 2001-06-19 | 2006-11-15 | シャープ株式会社 | Sram及びその製造方法 |
JP2003332582A (ja) * | 2002-05-13 | 2003-11-21 | Toshiba Corp | 半導体装置及びその製造方法 |
US20050208857A1 (en) * | 2004-03-19 | 2005-09-22 | Nike, Inc. | Article of apparel incorporating a modifiable textile structure |
US8247840B2 (en) * | 2004-07-07 | 2012-08-21 | Semi Solutions, Llc | Apparatus and method for improved leakage current of silicon on insulator transistors using a forward biased diode |
US7375402B2 (en) * | 2004-07-07 | 2008-05-20 | Semi Solutions, Llc | Method and apparatus for increasing stability of MOS memory cells |
US7224205B2 (en) * | 2004-07-07 | 2007-05-29 | Semi Solutions, Llc | Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors |
US7683433B2 (en) * | 2004-07-07 | 2010-03-23 | Semi Solution, Llc | Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors |
US7651905B2 (en) * | 2005-01-12 | 2010-01-26 | Semi Solutions, Llc | Apparatus and method for reducing gate leakage in deep sub-micron MOS transistors using semi-rectifying contacts |
WO2006072094A2 (fr) | 2004-12-29 | 2006-07-06 | Semi Solutions Llc. | Appareil et procede destines a ameliorer la resistance d'attaque, la fuite et la stabilite de transistors mos submicroniques profonds et de cellules de memoire |
US7898297B2 (en) * | 2005-01-04 | 2011-03-01 | Semi Solution, Llc | Method and apparatus for dynamic threshold voltage control of MOS transistors in dynamic logic circuits |
US7863689B2 (en) * | 2006-09-19 | 2011-01-04 | Semi Solutions, Llc. | Apparatus for using a well current source to effect a dynamic threshold voltage of a MOS transistor |
US7923840B2 (en) * | 2007-01-10 | 2011-04-12 | International Business Machines Corporation | Electrically conductive path forming below barrier oxide layer and integrated circuit |
US8207784B2 (en) * | 2008-02-12 | 2012-06-26 | Semi Solutions, Llc | Method and apparatus for MOSFET drain-source leakage reduction |
US7960229B2 (en) * | 2008-04-10 | 2011-06-14 | Globalfoundries Inc. | Metal oxide semiconductor transistor with reduced gate height, and related fabrication methods |
TWI494673B (zh) * | 2012-09-21 | 2015-08-01 | Innocom Tech Shenzhen Co Ltd | 顯示裝置 |
CN105280715B (zh) * | 2015-11-30 | 2018-05-08 | 上海华虹宏力半导体制造有限公司 | Soi体接触器件结构 |
FR3048288B1 (fr) | 2016-02-25 | 2018-03-23 | Stmicroelectronics (Crolles 2) Sas | Detecteur electronique integre de variations de potentiel a haute sensibilite |
KR102395616B1 (ko) * | 2016-10-10 | 2022-05-09 | 어플라이드 머티어리얼스, 인코포레이티드 | 화학적 기계적 연마를 위한 실시간 프로파일 제어 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR520556A (fr) | 1920-07-13 | 1921-06-28 | Georges Henri Ernest De Ram | Perfectionnements aux suspensions des véhicules automobiles ou autres |
US4228447A (en) * | 1979-02-12 | 1980-10-14 | Tektronix, Inc. | Submicron channel length MOS inverter with depletion-mode load transistor |
JPS58151062A (ja) * | 1982-01-28 | 1983-09-08 | Toshiba Corp | 半導体装置 |
US4906587A (en) * | 1988-07-29 | 1990-03-06 | Texas Instruments Incorporated | Making a silicon-on-insulator transistor with selectable body node to source node connection |
JPH04241466A (ja) * | 1991-01-16 | 1992-08-28 | Casio Comput Co Ltd | 電界効果型トランジスタ |
US5451798A (en) * | 1993-03-18 | 1995-09-19 | Canon Kabushiki Kaisha | Semiconductor device and its fabrication method |
US5559368A (en) * | 1994-08-30 | 1996-09-24 | The Regents Of The University Of California | Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation |
JP3463269B2 (ja) * | 1995-04-21 | 2003-11-05 | 日本電信電話株式会社 | Mosfet回路 |
US5821769A (en) * | 1995-04-21 | 1998-10-13 | Nippon Telegraph And Telephone Corporation | Low voltage CMOS logic circuit with threshold voltage control |
US5739577A (en) * | 1995-04-21 | 1998-04-14 | Micron Technology, Inc. | Resistive structure for integrated circuits and method of forming same |
FR2737343B1 (fr) * | 1995-07-28 | 1997-10-24 | Ferraz | Composant limiteur de courant et procede de realisation |
JPH09252125A (ja) * | 1996-03-15 | 1997-09-22 | Toshiba Corp | 半導体装置 |
JP3547906B2 (ja) * | 1996-06-18 | 2004-07-28 | 株式会社東芝 | 半導体集積回路装置 |
JPH1041406A (ja) * | 1996-07-18 | 1998-02-13 | Mitsubishi Electric Corp | 半導体装置 |
JP3195256B2 (ja) * | 1996-10-24 | 2001-08-06 | 株式会社東芝 | 半導体集積回路 |
US5753955A (en) * | 1996-12-19 | 1998-05-19 | Honeywell Inc. | MOS device having a gate to body connection with a body injection current limiting feature for use on silicon on insulator substrates |
JP3353875B2 (ja) * | 1997-01-20 | 2002-12-03 | シャープ株式会社 | Soi・mos電界効果トランジスタ |
KR100248205B1 (ko) * | 1997-06-25 | 2000-03-15 | 김영환 | 반도체 메모리 디바이스 및 그 형성방법 |
KR100451381B1 (ko) * | 1998-07-30 | 2005-06-01 | 엘지.필립스 엘시디 주식회사 | 박막트랜지스터및그제조방법 |
US6015993A (en) * | 1998-08-31 | 2000-01-18 | International Business Machines Corporation | Semiconductor diode with depleted polysilicon gate structure and method |
US6100564A (en) * | 1998-09-30 | 2000-08-08 | International Business Machines Corporation | SOI pass-gate disturb solution |
JP3408762B2 (ja) * | 1998-12-03 | 2003-05-19 | シャープ株式会社 | Soi構造の半導体装置及びその製造方法 |
-
1999
- 1999-02-05 FR FR9901369A patent/FR2789519B1/fr not_active Expired - Fee Related
-
2000
- 2000-02-04 US US09/890,120 patent/US6787850B1/en not_active Expired - Fee Related
- 2000-02-04 WO PCT/FR2000/000268 patent/WO2000046858A1/fr active Application Filing
- 2000-02-04 EP EP00901716A patent/EP1153435A1/fr not_active Withdrawn
- 2000-02-04 JP JP2000597843A patent/JP2002536833A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
US6787850B1 (en) | 2004-09-07 |
EP1153435A1 (fr) | 2001-11-14 |
FR2789519A1 (fr) | 2000-08-11 |
JP2002536833A (ja) | 2002-10-29 |
WO2000046858A1 (fr) | 2000-08-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20121031 |