FR2667983B1 - Procede de conditionnement de circuits integres et boitiers realises par sa mise en óoeuvre. - Google Patents

Procede de conditionnement de circuits integres et boitiers realises par sa mise en óoeuvre.

Info

Publication number
FR2667983B1
FR2667983B1 FR9112559A FR9112559A FR2667983B1 FR 2667983 B1 FR2667983 B1 FR 2667983B1 FR 9112559 A FR9112559 A FR 9112559A FR 9112559 A FR9112559 A FR 9112559A FR 2667983 B1 FR2667983 B1 FR 2667983B1
Authority
FR
France
Prior art keywords
implementation
integrated circuits
packaging integrated
housing produced
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9112559A
Other languages
English (en)
French (fr)
Other versions
FR2667983A1 (fr
Inventor
Man K. Lam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of FR2667983A1 publication Critical patent/FR2667983A1/fr
Application granted granted Critical
Publication of FR2667983B1 publication Critical patent/FR2667983B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H10W76/10—
    • H10W70/093—
    • H10W20/40—
    • H10W90/00—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
FR9112559A 1990-10-12 1991-10-11 Procede de conditionnement de circuits integres et boitiers realises par sa mise en óoeuvre. Expired - Fee Related FR2667983B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/596,690 US5079835A (en) 1990-10-12 1990-10-12 Method of forming a carrierless surface mounted integrated circuit die

Publications (2)

Publication Number Publication Date
FR2667983A1 FR2667983A1 (fr) 1992-04-17
FR2667983B1 true FR2667983B1 (fr) 1994-01-28

Family

ID=24388292

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9112559A Expired - Fee Related FR2667983B1 (fr) 1990-10-12 1991-10-11 Procede de conditionnement de circuits integres et boitiers realises par sa mise en óoeuvre.

Country Status (7)

Country Link
US (1) US5079835A (enExample)
JP (1) JP3113005B2 (enExample)
KR (1) KR100204950B1 (enExample)
DE (1) DE4133598C2 (enExample)
FR (1) FR2667983B1 (enExample)
GB (1) GB2248721B (enExample)
TW (1) TW243533B (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5574629A (en) * 1989-06-09 1996-11-12 Sullivan; Kenneth W. Solderless printed wiring devices
DE4438449A1 (de) * 1994-10-28 1996-07-04 Sibet Gmbh Sican Forschungs Un Verfahren zur direkten Kontaktierung elektronischer Bauelemente mit einem Träger und direkt kontaktierbare Bauelemente hierzu
US7842599B2 (en) * 1997-05-27 2010-11-30 Wstp, Llc Bumping electronic components using transfer substrates
US7819301B2 (en) * 1997-05-27 2010-10-26 Wstp, Llc Bumping electronic components using transfer substrates
US6293456B1 (en) * 1997-05-27 2001-09-25 Spheretek, Llc Methods for forming solder balls on substrates
US7007833B2 (en) 1997-05-27 2006-03-07 Mackay John Forming solder balls on substrates
US7288471B2 (en) * 1997-05-27 2007-10-30 Mackay John Bumping electronic components using transfer substrates
US7654432B2 (en) * 1997-05-27 2010-02-02 Wstp, Llc Forming solder balls on substrates
US6609652B2 (en) 1997-05-27 2003-08-26 Spheretek, Llc Ball bumping substrates, particuarly wafers
US6335225B1 (en) * 1998-02-20 2002-01-01 Micron Technology, Inc. High density direct connect LOC assembly
JP2004222486A (ja) * 2002-12-27 2004-08-05 Murata Mfg Co Ltd スイッチング電源モジュール
JP2005129552A (ja) * 2003-10-21 2005-05-19 Rohm Co Ltd 回路基板
KR100877551B1 (ko) * 2008-05-30 2009-01-07 윤점채 전자파 차폐 기능을 갖는 반도체 패키지, 그 제조방법 및 지그
JP4881351B2 (ja) * 2008-07-30 2012-02-22 アオイ電子株式会社 半導体装置およびその製造方法
JP5261553B2 (ja) * 2011-09-15 2013-08-14 アオイ電子株式会社 半導体装置およびその製造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3398232A (en) * 1965-10-19 1968-08-20 Amp Inc Circuit board with interconnected signal conductors and interconnected shielding conductors
US3483308A (en) * 1968-10-24 1969-12-09 Texas Instruments Inc Modular packages for semiconductor devices
GB1250248A (enExample) * 1969-06-12 1971-10-20
JPS5571558U (enExample) * 1978-11-08 1980-05-16
US4249299A (en) * 1979-03-05 1981-02-10 Hughes Aircraft Company Edge-around leads for backside connections to silicon circuit die
US4288841A (en) * 1979-09-20 1981-09-08 Bell Telephone Laboratories, Incorporated Double cavity semiconductor chip carrier
US4423468A (en) * 1980-10-01 1983-12-27 Motorola, Inc. Dual electronic component assembly
US4538346A (en) * 1981-09-14 1985-09-03 Sfe Technologies, Inc. Method for manufacture of selectively coated carrier plate
FR2515428A1 (fr) * 1981-10-27 1983-04-29 Thomson Csf Boitier comportant au moins deux circuits integres
JPS58159360A (ja) * 1982-03-17 1983-09-21 Fujitsu Ltd 半導体装置
JPS5921047A (ja) * 1982-07-27 1984-02-02 Fuji Xerox Co Ltd リ−ドレスチツプキヤリア
US4551747A (en) * 1982-10-05 1985-11-05 Mayo Foundation Leadless chip carrier apparatus providing for a transmission line environment and improved heat dissipation
US4572757A (en) * 1984-01-23 1986-02-25 The Jade Corporation Method of making a microcircuit substrate
US4670770A (en) * 1984-02-21 1987-06-02 American Telephone And Telegraph Company Integrated circuit chip-and-substrate assembly
JPS62263666A (ja) * 1986-05-10 1987-11-16 Matsushita Electronics Corp 樹脂封止型半導体パツケ−ジ
JPH0770558B2 (ja) * 1986-05-13 1995-07-31 三菱電機株式会社 半導体装置
US4899207A (en) * 1986-08-27 1990-02-06 Digital Equipment Corporation Outer lead tape automated bonding
US4860443A (en) * 1987-01-21 1989-08-29 Hughes Aircraft Company Method for connecting leadless chip package
US4821007A (en) * 1987-02-06 1989-04-11 Tektronix, Inc. Strip line circuit component and method of manufacture

Also Published As

Publication number Publication date
FR2667983A1 (fr) 1992-04-17
TW243533B (enExample) 1995-03-21
US5079835A (en) 1992-01-14
DE4133598C2 (de) 2000-06-21
DE4133598A1 (de) 1992-04-16
JP3113005B2 (ja) 2000-11-27
GB2248721A (en) 1992-04-15
GB9121255D0 (en) 1991-11-20
KR100204950B1 (ko) 1999-06-15
JPH0613436A (ja) 1994-01-21
GB2248721B (en) 1994-07-06
KR920008899A (ko) 1992-05-28

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20060630