GB1250248A - - Google Patents

Info

Publication number
GB1250248A
GB1250248A GB2997369A GB1250248DA GB1250248A GB 1250248 A GB1250248 A GB 1250248A GB 2997369 A GB2997369 A GB 2997369A GB 1250248D A GB1250248D A GB 1250248DA GB 1250248 A GB1250248 A GB 1250248A
Authority
GB
United Kingdom
Prior art keywords
beam leads
upper face
moat
wafer
semi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2997369A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1250248A publication Critical patent/GB1250248A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Landscapes

  • Die Bonding (AREA)
GB2997369A 1969-06-12 1969-06-12 Expired GB1250248A (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2997369 1969-06-12

Publications (1)

Publication Number Publication Date
GB1250248A true GB1250248A (enExample) 1971-10-20

Family

ID=10300204

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2997369A Expired GB1250248A (enExample) 1969-06-12 1969-06-12

Country Status (2)

Country Link
GB (1) GB1250248A (enExample)
NL (1) NL7008645A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2189873A1 (enExample) * 1972-06-23 1974-01-25 Rca Corp
FR2515428A1 (fr) * 1981-10-27 1983-04-29 Thomson Csf Boitier comportant au moins deux circuits integres
EP0461316A1 (en) * 1989-03-28 1991-12-18 General Electric Company Die attachment
FR2667983A1 (fr) * 1990-10-12 1992-04-17 Atmel Corp Procede de conditionnement de circuits integres et boitiers realises par sa mise en óoeuvre.

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2189873A1 (enExample) * 1972-06-23 1974-01-25 Rca Corp
FR2515428A1 (fr) * 1981-10-27 1983-04-29 Thomson Csf Boitier comportant au moins deux circuits integres
EP0078194A1 (fr) * 1981-10-27 1983-05-04 Thomson-Csf Procédé de fabrication d'un boîtier comportant au moins deux circuits intégrés
EP0461316A1 (en) * 1989-03-28 1991-12-18 General Electric Company Die attachment
FR2667983A1 (fr) * 1990-10-12 1992-04-17 Atmel Corp Procede de conditionnement de circuits integres et boitiers realises par sa mise en óoeuvre.

Also Published As

Publication number Publication date
NL7008645A (enExample) 1970-12-15

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees