FR2506519B1 - Procede d'attaque ionique reactive de couches contenant du tantale et du silicium - Google Patents

Procede d'attaque ionique reactive de couches contenant du tantale et du silicium

Info

Publication number
FR2506519B1
FR2506519B1 FR828208669A FR8208669A FR2506519B1 FR 2506519 B1 FR2506519 B1 FR 2506519B1 FR 828208669 A FR828208669 A FR 828208669A FR 8208669 A FR8208669 A FR 8208669A FR 2506519 B1 FR2506519 B1 FR 2506519B1
Authority
FR
France
Prior art keywords
silicon
reactive ion
layers containing
containing tantalum
ion attack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR828208669A
Other languages
English (en)
French (fr)
Other versions
FR2506519A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2506519A1 publication Critical patent/FR2506519A1/fr
Application granted granted Critical
Publication of FR2506519B1 publication Critical patent/FR2506519B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H10P50/268—
    • H10D64/01312—
FR828208669A 1981-05-22 1982-05-18 Procede d'attaque ionique reactive de couches contenant du tantale et du silicium Expired FR2506519B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US26643381A 1981-05-22 1981-05-22

Publications (2)

Publication Number Publication Date
FR2506519A1 FR2506519A1 (fr) 1982-11-26
FR2506519B1 true FR2506519B1 (fr) 1985-07-26

Family

ID=23014579

Family Applications (1)

Application Number Title Priority Date Filing Date
FR828208669A Expired FR2506519B1 (fr) 1981-05-22 1982-05-18 Procede d'attaque ionique reactive de couches contenant du tantale et du silicium

Country Status (8)

Country Link
JP (1) JPS57198633A (OSRAM)
BE (1) BE893251A (OSRAM)
CA (1) CA1202597A (OSRAM)
DE (1) DE3219284A1 (OSRAM)
FR (1) FR2506519B1 (OSRAM)
GB (1) GB2098931B (OSRAM)
IT (1) IT1151209B (OSRAM)
NL (1) NL8202103A (OSRAM)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3216823A1 (de) * 1982-05-05 1983-11-10 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von strukturen von aus metallsilizid und polysilizium bestehenden doppelschichten auf integrierte halbleiterschaltungen enthaltenden substraten durch reaktives ionenaetzen
US4414057A (en) * 1982-12-03 1983-11-08 Inmos Corporation Anisotropic silicide etching process
DE3315719A1 (de) * 1983-04-29 1984-10-31 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von strukturen von aus metallsiliziden bzw. silizid-polysilizium bestehenden doppelschichten fuer integrierte halbleiterschaltungen durch reaktives ionenaetzen
US4528066A (en) * 1984-07-06 1985-07-09 Ibm Corporation Selective anisotropic reactive ion etching process for polysilicide composite structures
NL8500771A (nl) * 1985-03-18 1986-10-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een op een laag siliciumoxide aanwezige dubbellaag - bestaande uit poly-si en een silicide - in een plasma wordt geetst.
WO1987000345A1 (en) * 1985-06-28 1987-01-15 American Telephone & Telegraph Company Procedure for fabricating devices involving dry etching
DE4114741C2 (de) * 1990-07-04 1998-11-12 Mitsubishi Electric Corp Verfahren zur Bildung einer Leiterbahn auf einem Halbleitersubstrat
US6177337B1 (en) * 1998-01-06 2001-01-23 International Business Machines Corporation Method of reducing metal voids in semiconductor device interconnection

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519873A (en) * 1978-07-28 1980-02-12 Mitsubishi Electric Corp Forming method of metallic layer pattern for semiconductor

Also Published As

Publication number Publication date
GB2098931A (en) 1982-12-01
IT8221430A0 (it) 1982-05-21
GB2098931B (en) 1985-02-06
FR2506519A1 (fr) 1982-11-26
JPS57198633A (en) 1982-12-06
DE3219284A1 (de) 1982-12-16
BE893251A (fr) 1982-09-16
IT1151209B (it) 1986-12-17
DE3219284C2 (OSRAM) 1989-08-10
NL8202103A (nl) 1982-12-16
CA1202597A (en) 1986-04-01

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Legal Events

Date Code Title Description
ST Notification of lapse