JPS57198633A - Method of producing semiconductor device - Google Patents

Method of producing semiconductor device

Info

Publication number
JPS57198633A
JPS57198633A JP57084147A JP8414782A JPS57198633A JP S57198633 A JPS57198633 A JP S57198633A JP 57084147 A JP57084147 A JP 57084147A JP 8414782 A JP8414782 A JP 8414782A JP S57198633 A JPS57198633 A JP S57198633A
Authority
JP
Japan
Prior art keywords
semiconductor device
producing semiconductor
producing
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57084147A
Other languages
Japanese (ja)
Inventor
Serge Deslauriers Jean
Joseph Levinstein Hyman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of JPS57198633A publication Critical patent/JPS57198633A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
JP57084147A 1981-05-22 1982-05-20 Method of producing semiconductor device Pending JPS57198633A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US26643381A 1981-05-22 1981-05-22

Publications (1)

Publication Number Publication Date
JPS57198633A true JPS57198633A (en) 1982-12-06

Family

ID=23014579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57084147A Pending JPS57198633A (en) 1981-05-22 1982-05-20 Method of producing semiconductor device

Country Status (8)

Country Link
JP (1) JPS57198633A (en)
BE (1) BE893251A (en)
CA (1) CA1202597A (en)
DE (1) DE3219284A1 (en)
FR (1) FR2506519B1 (en)
GB (1) GB2098931B (en)
IT (1) IT1151209B (en)
NL (1) NL8202103A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58204538A (en) * 1982-05-05 1983-11-29 シ−メンス・アクチエンゲゼルシヤフト Method of producing metal silicide-polysilicon double layer on substrate containing integrated circuit

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4414057A (en) * 1982-12-03 1983-11-08 Inmos Corporation Anisotropic silicide etching process
DE3315719A1 (en) * 1983-04-29 1984-10-31 Siemens AG, 1000 Berlin und 8000 München METHOD FOR PRODUCING STRUCTURES FROM METAL SILICIDES OR SILICIDE-POLYSILIZIUM EXISTING DOUBLE LAYERS FOR INTEGRATED SEMICONDUCTOR CIRCUITS THROUGH REACTIVE ION NETWORK
US4528066A (en) * 1984-07-06 1985-07-09 Ibm Corporation Selective anisotropic reactive ion etching process for polysilicide composite structures
NL8500771A (en) * 1985-03-18 1986-10-16 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A DOUBLE LAYER PRESENT ON A LOW SILICON OXIDE CONTAINING POLY-SI AND A SILICIDE
KR930006526B1 (en) * 1985-06-28 1993-07-16 아메리칸 텔리폰 앤드 텔레그라프 캄파니 Dry ethcing procedure and devices formed by this procedure
DE4114741C2 (en) * 1990-07-04 1998-11-12 Mitsubishi Electric Corp Method for forming a printed conductor on a semiconductor substrate
US6177337B1 (en) * 1998-01-06 2001-01-23 International Business Machines Corporation Method of reducing metal voids in semiconductor device interconnection

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519873A (en) * 1978-07-28 1980-02-12 Mitsubishi Electric Corp Forming method of metallic layer pattern for semiconductor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519873A (en) * 1978-07-28 1980-02-12 Mitsubishi Electric Corp Forming method of metallic layer pattern for semiconductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58204538A (en) * 1982-05-05 1983-11-29 シ−メンス・アクチエンゲゼルシヤフト Method of producing metal silicide-polysilicon double layer on substrate containing integrated circuit

Also Published As

Publication number Publication date
CA1202597A (en) 1986-04-01
BE893251A (en) 1982-09-16
IT1151209B (en) 1986-12-17
IT8221430A0 (en) 1982-05-21
FR2506519A1 (en) 1982-11-26
NL8202103A (en) 1982-12-16
DE3219284A1 (en) 1982-12-16
FR2506519B1 (en) 1985-07-26
GB2098931A (en) 1982-12-01
GB2098931B (en) 1985-02-06
DE3219284C2 (en) 1989-08-10

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