FR2415336A1 - Canal d'entree/sortie rapide pour un dispositif informatique - Google Patents

Canal d'entree/sortie rapide pour un dispositif informatique

Info

Publication number
FR2415336A1
FR2415336A1 FR7901557A FR7901557A FR2415336A1 FR 2415336 A1 FR2415336 A1 FR 2415336A1 FR 7901557 A FR7901557 A FR 7901557A FR 7901557 A FR7901557 A FR 7901557A FR 2415336 A1 FR2415336 A1 FR 2415336A1
Authority
FR
France
Prior art keywords
computer device
output channel
quick input
memory
central processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7901557A
Other languages
English (en)
Other versions
FR2415336B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Data General Corp filed Critical Data General Corp
Publication of FR2415336A1 publication Critical patent/FR2415336A1/fr
Application granted granted Critical
Publication of FR2415336B1 publication Critical patent/FR2415336B1/fr
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1081Address translation for peripheral access to main memory, e.g. direct memory access [DMA]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
  • Information Transfer Systems (AREA)

Abstract

L'invention concerne l'informatique. Un dispositif informatique comprend notamment un processeur central, une mémoire, et un canal de données rapide 12A, 12B, qui permet de réaliser des transferts de données directs entre les dispositifs périphériques externes et la mémoire, en réduisant au minimum le temps d'immobilisation du processeur central. Application aux ordinateurs.
FR7901557A 1978-01-23 1979-01-22 Canal d'entree/sortie rapide pour un dispositif informatique Expired FR2415336B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US87169078A 1978-01-23 1978-01-23

Publications (2)

Publication Number Publication Date
FR2415336A1 true FR2415336A1 (fr) 1979-08-17
FR2415336B1 FR2415336B1 (fr) 1987-04-24

Family

ID=25357925

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7901557A Expired FR2415336B1 (fr) 1978-01-23 1979-01-22 Canal d'entree/sortie rapide pour un dispositif informatique

Country Status (12)

Country Link
JP (1) JPS54121032A (fr)
AU (1) AU526317B2 (fr)
BR (1) BR7900407A (fr)
CA (1) CA1128213A (fr)
CH (1) CH641581A5 (fr)
DE (1) DE2902477A1 (fr)
DK (1) DK157954C (fr)
FR (1) FR2415336B1 (fr)
GB (1) GB2013006B (fr)
IT (1) IT1110622B (fr)
NL (1) NL7900439A (fr)
SE (1) SE444996B (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0081961A2 (fr) * 1981-12-10 1983-06-22 Data General Corporation Système synchrone de bus de données avec vitesse de données automatiquement variable
FR2594242A1 (fr) * 1986-02-13 1987-08-14 Intelligent Instrumentation Procede et appareil d'acces direct en memoire

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4459677A (en) * 1980-04-11 1984-07-10 Ampex Corporation VIQ Computer graphics system
GB2138182B (en) * 1983-04-14 1986-09-24 Standard Telephones Cables Ltd Digital processor
US4607365A (en) * 1983-11-14 1986-08-19 Tandem Computers Incorporated Fault-tolerant communications controller system
JP2570847B2 (ja) * 1989-02-08 1997-01-16 日本電気株式会社 データ転送方式
CN108241516B (zh) * 2018-02-09 2021-06-18 深圳科立讯通信有限公司 嵌入式系统程序加载方法、装置、计算机设备和存储介质

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2210309A5 (fr) * 1972-12-06 1974-07-05 Amdahl Corp
US3976977A (en) * 1975-03-26 1976-08-24 Honeywell Information Systems, Inc. Processor for input-output processing system
US4055851A (en) * 1976-02-13 1977-10-25 Digital Equipment Corporation Memory module with means for generating a control signal that inhibits a subsequent overlapped memory cycle during a reading operation portion of a reading memory cycle

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3673576A (en) * 1970-07-13 1972-06-27 Eg & G Inc Programmable computer-peripheral interface
JPS522231A (en) * 1975-06-24 1977-01-08 Hitachi Ltd Information processing apparatus
JPS5272543A (en) * 1975-12-15 1977-06-17 Hitachi Ltd Channel equipment of having address converting function

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2210309A5 (fr) * 1972-12-06 1974-07-05 Amdahl Corp
US3976977A (en) * 1975-03-26 1976-08-24 Honeywell Information Systems, Inc. Processor for input-output processing system
US4055851A (en) * 1976-02-13 1977-10-25 Digital Equipment Corporation Memory module with means for generating a control signal that inhibits a subsequent overlapped memory cycle during a reading operation portion of a reading memory cycle

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXRV/77 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0081961A2 (fr) * 1981-12-10 1983-06-22 Data General Corporation Système synchrone de bus de données avec vitesse de données automatiquement variable
EP0081961A3 (fr) * 1981-12-10 1985-05-22 Data General Corporation Système synchrone de bus de données avec vitesse de données automatiquement variable
FR2594242A1 (fr) * 1986-02-13 1987-08-14 Intelligent Instrumentation Procede et appareil d'acces direct en memoire

Also Published As

Publication number Publication date
AU4322779A (en) 1979-08-02
JPS54121032A (en) 1979-09-19
IT7919549A0 (it) 1979-01-23
DK157954B (da) 1990-03-05
DE2902477A1 (de) 1979-07-26
SE444996B (sv) 1986-05-20
AU526317B2 (en) 1983-01-06
DK3979A (da) 1979-07-24
DK157954C (da) 1990-08-13
FR2415336B1 (fr) 1987-04-24
NL7900439A (nl) 1979-07-25
JPS6259821B2 (fr) 1987-12-12
BR7900407A (pt) 1979-08-21
CA1128213A (fr) 1982-07-20
GB2013006B (en) 1982-08-25
IT1110622B (it) 1985-12-23
SE7900138L (sv) 1979-07-24
CH641581A5 (de) 1984-02-29
GB2013006A (en) 1979-08-01

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Legal Events

Date Code Title Description
ST Notification of lapse