AU4322779A - High speed data channel for processor - Google Patents
High speed data channel for processorInfo
- Publication number
- AU4322779A AU4322779A AU43227/79A AU4322779A AU4322779A AU 4322779 A AU4322779 A AU 4322779A AU 43227/79 A AU43227/79 A AU 43227/79A AU 4322779 A AU4322779 A AU 4322779A AU 4322779 A AU4322779 A AU 4322779A
- Authority
- AU
- Australia
- Prior art keywords
- processor
- high speed
- data channel
- speed data
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Bus Control (AREA)
- Communication Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Debugging And Monitoring (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US87169078A | 1978-01-23 | 1978-01-23 | |
US871690 | 1986-06-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
AU4322779A true AU4322779A (en) | 1979-08-02 |
AU526317B2 AU526317B2 (en) | 1983-01-06 |
Family
ID=25357925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU43227/79A Ceased AU526317B2 (en) | 1978-01-23 | 1979-01-09 | High speed data channel for processor |
Country Status (12)
Country | Link |
---|---|
JP (1) | JPS54121032A (en) |
AU (1) | AU526317B2 (en) |
BR (1) | BR7900407A (en) |
CA (1) | CA1128213A (en) |
CH (1) | CH641581A5 (en) |
DE (1) | DE2902477A1 (en) |
DK (1) | DK157954C (en) |
FR (1) | FR2415336B1 (en) |
GB (1) | GB2013006B (en) |
IT (1) | IT1110622B (en) |
NL (1) | NL7900439A (en) |
SE (1) | SE444996B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5361335A (en) * | 1989-02-08 | 1994-11-01 | Nec Corporation | Input-output channel unit capable of predicting an overrun in a data processing device |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4459677A (en) * | 1980-04-11 | 1984-07-10 | Ampex Corporation | VIQ Computer graphics system |
US4476527A (en) * | 1981-12-10 | 1984-10-09 | Data General Corporation | Synchronous data bus with automatically variable data rate |
GB2138182B (en) * | 1983-04-14 | 1986-09-24 | Standard Telephones Cables Ltd | Digital processor |
US4607365A (en) * | 1983-11-14 | 1986-08-19 | Tandem Computers Incorporated | Fault-tolerant communications controller system |
US4847750A (en) * | 1986-02-13 | 1989-07-11 | Intelligent Instrumentation, Inc. | Peripheral DMA controller for data acquisition system |
CN108241516B (en) * | 2018-02-09 | 2021-06-18 | 深圳科立讯通信有限公司 | Embedded system program loading method and device, computer equipment and storage medium |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3673576A (en) * | 1970-07-13 | 1972-06-27 | Eg & G Inc | Programmable computer-peripheral interface |
GB1447297A (en) * | 1972-12-06 | 1976-08-25 | Amdahl Corp | Data processing system |
US3976977A (en) * | 1975-03-26 | 1976-08-24 | Honeywell Information Systems, Inc. | Processor for input-output processing system |
JPS522231A (en) * | 1975-06-24 | 1977-01-08 | Hitachi Ltd | Information processing apparatus |
JPS5272543A (en) * | 1975-12-15 | 1977-06-17 | Hitachi Ltd | Channel equipment of having address converting function |
US4055851A (en) * | 1976-02-13 | 1977-10-25 | Digital Equipment Corporation | Memory module with means for generating a control signal that inhibits a subsequent overlapped memory cycle during a reading operation portion of a reading memory cycle |
-
1979
- 1979-01-04 DK DK003979A patent/DK157954C/en not_active IP Right Cessation
- 1979-01-08 SE SE7900138A patent/SE444996B/en not_active IP Right Cessation
- 1979-01-09 AU AU43227/79A patent/AU526317B2/en not_active Ceased
- 1979-01-19 NL NL7900439A patent/NL7900439A/en not_active Application Discontinuation
- 1979-01-22 FR FR7901557A patent/FR2415336B1/en not_active Expired
- 1979-01-22 GB GB792152A patent/GB2013006B/en not_active Expired
- 1979-01-22 BR BR7900407A patent/BR7900407A/en unknown
- 1979-01-23 CH CH67379A patent/CH641581A5/en not_active IP Right Cessation
- 1979-01-23 IT IT19549/79A patent/IT1110622B/en active
- 1979-01-23 DE DE19792902477 patent/DE2902477A1/en not_active Ceased
- 1979-01-23 CA CA320,119A patent/CA1128213A/en not_active Expired
- 1979-01-23 JP JP648579A patent/JPS54121032A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5361335A (en) * | 1989-02-08 | 1994-11-01 | Nec Corporation | Input-output channel unit capable of predicting an overrun in a data processing device |
Also Published As
Publication number | Publication date |
---|---|
JPS54121032A (en) | 1979-09-19 |
IT7919549A0 (en) | 1979-01-23 |
DK157954B (en) | 1990-03-05 |
DE2902477A1 (en) | 1979-07-26 |
SE444996B (en) | 1986-05-20 |
FR2415336A1 (en) | 1979-08-17 |
AU526317B2 (en) | 1983-01-06 |
DK3979A (en) | 1979-07-24 |
DK157954C (en) | 1990-08-13 |
FR2415336B1 (en) | 1987-04-24 |
NL7900439A (en) | 1979-07-25 |
JPS6259821B2 (en) | 1987-12-12 |
BR7900407A (en) | 1979-08-21 |
CA1128213A (en) | 1982-07-20 |
GB2013006B (en) | 1982-08-25 |
IT1110622B (en) | 1985-12-23 |
SE7900138L (en) | 1979-07-24 |
CH641581A5 (en) | 1984-02-29 |
GB2013006A (en) | 1979-08-01 |
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