GB2013006A - Data processing system using a high speed data channel - Google Patents

Data processing system using a high speed data channel

Info

Publication number
GB2013006A
GB2013006A GB792152A GB7902152A GB2013006A GB 2013006 A GB2013006 A GB 2013006A GB 792152 A GB792152 A GB 792152A GB 7902152 A GB7902152 A GB 7902152A GB 2013006 A GB2013006 A GB 2013006A
Authority
GB
United Kingdom
Prior art keywords
memory
data
high speed
central processor
processor unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB792152A
Other versions
GB2013006B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Data General Corp filed Critical Data General Corp
Publication of GB2013006A publication Critical patent/GB2013006A/en
Application granted granted Critical
Publication of GB2013006B publication Critical patent/GB2013006B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]

Abstract

A data processing system includes central processor unit (CPU), a memory and a high speed, or "burst multiplexer", channel for permitting direct access to the memory by an input/output (I/O) device connected to a bus 10 without the need to use registers in the central processor unit and control signals from the central processor unit. The high speed channel utilizes its own memory port 22 separate from that of the CPU and includes internal paths for transferring addresses and data between an I/O device and the memory. The channel further includes a memory allocation and protection unit 17 (MAP) which selectively carries out logical to physical address translation and which can be loaded by transfer of memory allocation data via substantially the same common path as the I/O data transfer. Appropriate control logic is also included to control the data and address transfers and the MAP load and dump operations so that blocks of data words can be transferred sequentially and directly to or from the memory. <IMAGE>
GB792152A 1978-01-23 1979-01-22 Data processing system using a high speed data channel Expired GB2013006B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US87169078A 1978-01-23 1978-01-23

Publications (2)

Publication Number Publication Date
GB2013006A true GB2013006A (en) 1979-08-01
GB2013006B GB2013006B (en) 1982-08-25

Family

ID=25357925

Family Applications (1)

Application Number Title Priority Date Filing Date
GB792152A Expired GB2013006B (en) 1978-01-23 1979-01-22 Data processing system using a high speed data channel

Country Status (12)

Country Link
JP (1) JPS54121032A (en)
AU (1) AU526317B2 (en)
BR (1) BR7900407A (en)
CA (1) CA1128213A (en)
CH (1) CH641581A5 (en)
DE (1) DE2902477A1 (en)
DK (1) DK157954C (en)
FR (1) FR2415336B1 (en)
GB (1) GB2013006B (en)
IT (1) IT1110622B (en)
NL (1) NL7900439A (en)
SE (1) SE444996B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4459677A (en) * 1980-04-11 1984-07-10 Ampex Corporation VIQ Computer graphics system
GB2138182A (en) * 1983-04-14 1984-10-17 Standard Telephones Cables Ltd Digital processor
GB2186719A (en) * 1986-02-13 1987-08-19 Intelligent Instrumentation Peripheral dma controller for data acquisition system

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4476527A (en) * 1981-12-10 1984-10-09 Data General Corporation Synchronous data bus with automatically variable data rate
US4607365A (en) * 1983-11-14 1986-08-19 Tandem Computers Incorporated Fault-tolerant communications controller system
JP2570847B2 (en) * 1989-02-08 1997-01-16 日本電気株式会社 Data transfer method
CN108241516B (en) * 2018-02-09 2021-06-18 深圳科立讯通信有限公司 Embedded system program loading method and device, computer equipment and storage medium

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3673576A (en) * 1970-07-13 1972-06-27 Eg & G Inc Programmable computer-peripheral interface
GB1447297A (en) * 1972-12-06 1976-08-25 Amdahl Corp Data processing system
US3976977A (en) * 1975-03-26 1976-08-24 Honeywell Information Systems, Inc. Processor for input-output processing system
JPS522231A (en) * 1975-06-24 1977-01-08 Hitachi Ltd Information processing apparatus
JPS5272543A (en) * 1975-12-15 1977-06-17 Hitachi Ltd Channel equipment of having address converting function
US4055851A (en) * 1976-02-13 1977-10-25 Digital Equipment Corporation Memory module with means for generating a control signal that inhibits a subsequent overlapped memory cycle during a reading operation portion of a reading memory cycle

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4459677A (en) * 1980-04-11 1984-07-10 Ampex Corporation VIQ Computer graphics system
GB2138182A (en) * 1983-04-14 1984-10-17 Standard Telephones Cables Ltd Digital processor
GB2186719A (en) * 1986-02-13 1987-08-19 Intelligent Instrumentation Peripheral dma controller for data acquisition system
GB2186719B (en) * 1986-02-13 1990-04-18 Intelligent Instrumentation Peripheral dma controller for data acquisition system

Also Published As

Publication number Publication date
FR2415336B1 (en) 1987-04-24
AU4322779A (en) 1979-08-02
IT7919549A0 (en) 1979-01-23
BR7900407A (en) 1979-08-21
IT1110622B (en) 1985-12-23
DK157954C (en) 1990-08-13
JPS6259821B2 (en) 1987-12-12
SE444996B (en) 1986-05-20
DK157954B (en) 1990-03-05
AU526317B2 (en) 1983-01-06
GB2013006B (en) 1982-08-25
DE2902477A1 (en) 1979-07-26
DK3979A (en) 1979-07-24
SE7900138L (en) 1979-07-24
NL7900439A (en) 1979-07-25
JPS54121032A (en) 1979-09-19
FR2415336A1 (en) 1979-08-17
CH641581A5 (en) 1984-02-29
CA1128213A (en) 1982-07-20

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19940122