JPS5720831A - Local burst transfer controlling system - Google Patents

Local burst transfer controlling system

Info

Publication number
JPS5720831A
JPS5720831A JP9482580A JP9482580A JPS5720831A JP S5720831 A JPS5720831 A JP S5720831A JP 9482580 A JP9482580 A JP 9482580A JP 9482580 A JP9482580 A JP 9482580A JP S5720831 A JPS5720831 A JP S5720831A
Authority
JP
Japan
Prior art keywords
data
transferred
memory
bytes
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9482580A
Other languages
Japanese (ja)
Other versions
JPS5936773B2 (en
Inventor
Masahiro Kawakatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55094825A priority Critical patent/JPS5936773B2/en
Publication of JPS5720831A publication Critical patent/JPS5720831A/en
Publication of JPS5936773B2 publication Critical patent/JPS5936773B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To ensure highly efficient access of memory in a local burst transfer controlling system, by firstly giving transfer control to the byte quantity up to a word boundary at an early time of memory access. CONSTITUTION:In case the bytes up to (1)-(12) are transferred to a main memory 1 from an input/output device I/O, a channel controlling circuit 6 sets the address of the data byte (1) to a data address buffer 3 from a CCW by a data request signal. The data bytes (1) and (2) are stored in sequence in a data register 2 from data buffer registers 8-0-8-3 of the device I/O and according to the address of a data address buffer 3. The contents of the register 2 are transferred to the memory 1 after detecting by a decoder 5 that the next data byte address exceeds a word boundary, and the data bytes (3)-(6) to be transferred next are stored in the registers 8-0-8-3. In such way, the bytes (1) and (2) up to the word boundary are firstly transferred, and accordingly, the data equivalent to a word can be thereafter transferred at a time to the memory 1 to increase the memory access efficiency.
JP55094825A 1980-07-11 1980-07-11 Local burst transfer control method Expired JPS5936773B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55094825A JPS5936773B2 (en) 1980-07-11 1980-07-11 Local burst transfer control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55094825A JPS5936773B2 (en) 1980-07-11 1980-07-11 Local burst transfer control method

Publications (2)

Publication Number Publication Date
JPS5720831A true JPS5720831A (en) 1982-02-03
JPS5936773B2 JPS5936773B2 (en) 1984-09-05

Family

ID=14120822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55094825A Expired JPS5936773B2 (en) 1980-07-11 1980-07-11 Local burst transfer control method

Country Status (1)

Country Link
JP (1) JPS5936773B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61221965A (en) * 1985-03-28 1986-10-02 Nec Corp Vector data processor
JPS62134743A (en) * 1985-12-06 1987-06-17 Fujitsu Ltd Byte alignment control system
JPS63196967A (en) * 1987-02-10 1988-08-15 Fujitsu Ltd Data transfer control equipment
JPH02159661A (en) * 1988-12-13 1990-06-19 Fujitsu Ltd Data transfer processing system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61221965A (en) * 1985-03-28 1986-10-02 Nec Corp Vector data processor
JPS62134743A (en) * 1985-12-06 1987-06-17 Fujitsu Ltd Byte alignment control system
JPS63196967A (en) * 1987-02-10 1988-08-15 Fujitsu Ltd Data transfer control equipment
JPH02159661A (en) * 1988-12-13 1990-06-19 Fujitsu Ltd Data transfer processing system

Also Published As

Publication number Publication date
JPS5936773B2 (en) 1984-09-05

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