JPS522231A - Information processing apparatus - Google Patents
Information processing apparatusInfo
- Publication number
- JPS522231A JPS522231A JP50076681A JP7668175A JPS522231A JP S522231 A JPS522231 A JP S522231A JP 50076681 A JP50076681 A JP 50076681A JP 7668175 A JP7668175 A JP 7668175A JP S522231 A JPS522231 A JP S522231A
- Authority
- JP
- Japan
- Prior art keywords
- processing apparatus
- information processing
- control
- logical address
- address system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
- Memory System (AREA)
Abstract
PURPOSE: To enable application of a logical address system of an I/O control.
COPYRIGHT: (C)1977,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50076681A JPS522231A (en) | 1975-06-24 | 1975-06-24 | Information processing apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50076681A JPS522231A (en) | 1975-06-24 | 1975-06-24 | Information processing apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS522231A true JPS522231A (en) | 1977-01-08 |
Family
ID=13612162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50076681A Pending JPS522231A (en) | 1975-06-24 | 1975-06-24 | Information processing apparatus |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS522231A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5322331A (en) * | 1976-08-13 | 1978-03-01 | Fujitsu Ltd | Dynamic address conversion s ystem |
JPS5456736A (en) * | 1977-09-21 | 1979-05-08 | Sperry Rand Corp | Method of virtually addressing input*output operation externally specified |
JPS54121032A (en) * | 1978-01-23 | 1979-09-19 | Deetaa Gen Corp | Data processor using high speed data channel |
JPS58118764A (en) * | 1982-01-08 | 1983-07-14 | 藤村 明宏 | Artificial heart apparatus |
JPS61213058A (en) * | 1985-03-14 | 1986-09-22 | シエルハイ アイエヌシ− | Auxiliary apparatus in coronary arteries |
JPS61160091U (en) * | 1985-03-22 | 1986-10-03 | ||
JPS61272857A (en) * | 1985-05-28 | 1986-12-03 | Fujitsu Ltd | Address expanding system of input/output processing |
JPS6284770A (en) * | 1985-07-15 | 1987-04-18 | エイバイオメッド インコーポレイテッド | High cycle heart support system in artery |
JPS62134151U (en) * | 1986-05-23 | 1987-08-24 |
-
1975
- 1975-06-24 JP JP50076681A patent/JPS522231A/en active Pending
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS573967B2 (en) * | 1976-08-13 | 1982-01-23 | ||
JPS5322331A (en) * | 1976-08-13 | 1978-03-01 | Fujitsu Ltd | Dynamic address conversion s ystem |
JPS5456736A (en) * | 1977-09-21 | 1979-05-08 | Sperry Rand Corp | Method of virtually addressing input*output operation externally specified |
JPS6259821B2 (en) * | 1978-01-23 | 1987-12-12 | Data General Corp | |
JPS54121032A (en) * | 1978-01-23 | 1979-09-19 | Deetaa Gen Corp | Data processor using high speed data channel |
JPS58118764A (en) * | 1982-01-08 | 1983-07-14 | 藤村 明宏 | Artificial heart apparatus |
JPH038227B2 (en) * | 1982-01-08 | 1991-02-05 | Akihiro Fujimura | |
JPS61213058A (en) * | 1985-03-14 | 1986-09-22 | シエルハイ アイエヌシ− | Auxiliary apparatus in coronary arteries |
JPS61160091U (en) * | 1985-03-22 | 1986-10-03 | ||
JPS61272857A (en) * | 1985-05-28 | 1986-12-03 | Fujitsu Ltd | Address expanding system of input/output processing |
JPH056221B2 (en) * | 1985-05-28 | 1993-01-26 | Fujitsu Ltd | |
JPS6284770A (en) * | 1985-07-15 | 1987-04-18 | エイバイオメッド インコーポレイテッド | High cycle heart support system in artery |
JPS62134151U (en) * | 1986-05-23 | 1987-08-24 |
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