JPS5650451A - Multiaccess system of multimicrocomputer - Google Patents

Multiaccess system of multimicrocomputer

Info

Publication number
JPS5650451A
JPS5650451A JP12701279A JP12701279A JPS5650451A JP S5650451 A JPS5650451 A JP S5650451A JP 12701279 A JP12701279 A JP 12701279A JP 12701279 A JP12701279 A JP 12701279A JP S5650451 A JPS5650451 A JP S5650451A
Authority
JP
Japan
Prior art keywords
memories
different
written
slave computers
another
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12701279A
Other languages
Japanese (ja)
Inventor
Itsuo Motomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP12701279A priority Critical patent/JPS5650451A/en
Publication of JPS5650451A publication Critical patent/JPS5650451A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE: To simplify program formation and debugging and shorten the data handling time, by setting conversion mode of address converting circuit, which slave computers have, different from one another.
CONSTITUTION: Slave computers 51W5n are connected to memory bus 4, and respective slave computers are equipped with address converting circuits 61W6n, shared memories 71W7n, and local CPUs 81W8n. In this system configuration, conversion modes of circuits 61W6n are set so that these modes are different one another in computers 51W5n. Therefore, memories 71W7n have memory addresses different one another only for read at the view from master CPU1. Consequently, in case that the same data is written from CPU1 to memories 71W7n, the same data can be written to different addresses of memories 71W7n by giving the same memory address to bus 4, so that the access time is reduced to the 1/n. Then, data written into shared memories can be used and processed simultaneously in slave computers.
COPYRIGHT: (C)1981,JPO&Japio
JP12701279A 1979-10-02 1979-10-02 Multiaccess system of multimicrocomputer Pending JPS5650451A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12701279A JPS5650451A (en) 1979-10-02 1979-10-02 Multiaccess system of multimicrocomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12701279A JPS5650451A (en) 1979-10-02 1979-10-02 Multiaccess system of multimicrocomputer

Publications (1)

Publication Number Publication Date
JPS5650451A true JPS5650451A (en) 1981-05-07

Family

ID=14949495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12701279A Pending JPS5650451A (en) 1979-10-02 1979-10-02 Multiaccess system of multimicrocomputer

Country Status (1)

Country Link
JP (1) JPS5650451A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS599767A (en) * 1982-07-09 1984-01-19 Sumitomo Heavy Ind Ltd Multiprocessor
JPS60189561A (en) * 1984-03-09 1985-09-27 Panafacom Ltd Memory access control system
JPS61240359A (en) * 1985-04-18 1986-10-25 Oki Electric Ind Co Ltd Inter-microprocessor data transmission system
JPS61249153A (en) * 1985-04-26 1986-11-06 Yokogawa Medical Syst Ltd Data processor
JPS63165950A (en) * 1986-12-27 1988-07-09 Pfu Ltd Common memory system
JPH01183762A (en) * 1988-01-18 1989-07-21 Daikin Ind Ltd Method and device for input of data
JPH02199562A (en) * 1989-01-30 1990-08-07 Oki Electric Ind Co Ltd Duplicated memory copy system
JPH0463022A (en) * 1990-06-30 1992-02-28 Nec Corp Pll frequency synthesizer

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS599767A (en) * 1982-07-09 1984-01-19 Sumitomo Heavy Ind Ltd Multiprocessor
JPS60189561A (en) * 1984-03-09 1985-09-27 Panafacom Ltd Memory access control system
JPH024936B2 (en) * 1984-03-09 1990-01-31 Pfu Ltd
JPS61240359A (en) * 1985-04-18 1986-10-25 Oki Electric Ind Co Ltd Inter-microprocessor data transmission system
JPS61249153A (en) * 1985-04-26 1986-11-06 Yokogawa Medical Syst Ltd Data processor
JPS63165950A (en) * 1986-12-27 1988-07-09 Pfu Ltd Common memory system
JPH01183762A (en) * 1988-01-18 1989-07-21 Daikin Ind Ltd Method and device for input of data
JPH02199562A (en) * 1989-01-30 1990-08-07 Oki Electric Ind Co Ltd Duplicated memory copy system
JPH0463022A (en) * 1990-06-30 1992-02-28 Nec Corp Pll frequency synthesizer

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